UGC-NET Electronic Science Question Paper With Answer Key and Full Explanation [Dec 2023]

 

 

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UGC-NET Electronic Science 2023 Answers with Explanations

51. (A): The stacking fault is the most common area defect found in silicon. These faults typically occur along the 111 plane. In the crystalline structure of silicon, atoms are arranged in a specific pattern known as a diamond lattice. A stacking fault refers to a disruption in the normal order of atomic layers within this lattice, which usually occurs in the 111 plane due to the geometric arrangement of the atoms. This type of defect can affect the electrical and mechanical properties of the material, such as the mobility of charge carriers and mechanical strength.

52. (C): The important figure of merit for the microwave application of a Schottky diode is the forward bias cutoff frequency f_co, which is given by:

f_co =

1 2πR_FC_F

In this context, R_F represents the forward resistance, and C_F is the junction capacitance of the Schottky diode. The cutoff frequency defines the frequency at which the diode ceases of function efficiently due to its inherent capacitance and resistance.

Option A is incorrect because it includes an extra R_F term and a C_F² term in the denominator, which is not consistent with the correct formula. Option B has an incorrect constant π and also squares C_F. Option D is incorrect because it misses the C_F in the denominator, simplifying it incorrectly.

53. (A): In a MOSFET, the carrier velocity v between the constant mobility regime and the saturation velocity can be described by the equation:

v =

μ_n E (1 + (μ_n E / v_s)ⁿ)^1/n

where:

• μ_n is the mobility of the carriers,
• E is the electric field,
• v_s is the saturation velocity,
• n is an empirical factor that determines the sharpness of the transition between the two regimes.

Option A correctly represents this equation. This equation describes how the velocity increases linearly with the electric field at low fields (constant mobility regime) and approaches the saturation velocity at high fields (saturation velocity regime).

54. (C): In a MOS (Metal-Oxide-Semiconductor) structure, the flat band voltage V_FB is the voltage at which the energy bands of the semiconductor are flat, meaning there is no band bending and the electric field in the semiconductor is zero. The flat band voltage can be expressed in terms of the work functions of the metal (φ_m) and the semiconductor (φ_s) as follows:

V_FB = φ_m - φ_s

This equation is derived from the need to align the Fermi levels of the metal and the semiconductor when they are brought into contact.

55. (D): When exposed to light, positive photoresists in developer solution become more soluble. Positive photoresists are designed such that the regions exposed to light undergo a chemical change, making them more soluble in the developer solution. This allows the exposed areas to be washed away during the development process, creating a pattern. The chemical structure of the photoresist is altered upon exposure to light, which increases its solubility.

56. (B): The Czochralski (Cz) method is preferred over the float zone technique for growing silicon crystals because it produces large diameter crystals. The Cz method involves melting silicon in a crucible and then slowly pulling a seed crystal from the melt, allowing a large single crystal to form. This method is well-suited for producing large diameter crystals, which are essential for manufacturing large silicon wafers used in the semiconductor industry.

57. (B): When silicon dioxide of thickness d is grown, the silicon consumed is 0.44d. This relationship comes from the fact that when silicon dioxide forms, silicon atoms combine with oxygen atoms, leading to a thicker layer of silicon dioxide than the silicon consumed. The factor 0.44 accounts for the volume expansion that occurs during the oxidation process.

58. (C): The evaporation rate from a clean surface is related to the equilibrium vapour pressure P_v of the evaporating species with molecular weight by the following expression:

R = 4.43 × 10^-4 (

MT

)^1/2 P_v

This formula is derived from kinetic theory and relates the evaporation rate to the vapour pressure and molecular weight, with temperature T factored into the denominator inside the square root. The term (

MT

)^1/2 indicates that the evaporation rate increases with higher molecular weight and decreases with higher temperature, which is consistent with physical principles where higher temperature provides more energy for molecules to escape the surface.

59. (A): The given time domain function is a rectangular pulse of width T and height I. The Fourier transform of a rectangular pulse is a sin c function, which is mathematically expressed as:

FT{x(t)} = X(ω) =

I√2π

sin c (

ωT2

)

The sin c function, defined as

sin c (x) =

sin(x)x

,

has a central peak at the origin and decays as ω increases. Option A shows a shape that matches the expected sinc function, with the central peak at ω = 0 and symmetrical decay on either side, accurately representing the Fourier transform of the rectangular pulse.

60. (A): To determine the correct T-parameters (ABCD parameters) for the given cascaded

network, we need to carefully analyze the network step-by-step, focusing on the correct option and the reasoning behind choosing it.

• Segment 1: 2Ω in series with (4Ω in parallel with 10Ω)
• Segment 2: 4Ω in series with (4Ω in parallel with 8Ω)
• Segment 3: 8Ω in series with 20Ω

Now Calculate the ABCD parameters for each segment:

• Segment 1:

Z_{parallel 1} = (

14

+

110

)^-1 =

207

Ω
Z_{total 1} = 2 +

207

=

347

Ω

The ABCD matrix for Segment 1 is:

1	347
0	1

• Segment 2:

Z_{parallel 2} = (

14

+

18

)^-1 =

83

Ω
Z_{total 2} = 4 +

83

=

203

Ω

The ABCD matrix for Segment 2 is:

1	203
0	1

• Segment 3:

Z_{parallel 3} = 8 + 20 = 28 Ω

The ABCD matrix for Segment 3 is:

1	28
0	1

Now Combine the ABCD matrices:
The total ABCD matrix is obtained by multiplying the individual matrices:
[T_total] = [T₁] ⋅ [T₂] ⋅ [T₃]

First, multiply the first two matrices:

[T₁₂] =

1	347
0	1

⋅

1	203
0	1

=

1	347 + 203
0	1

=

1	102 + 14021
0	1

=

1	24221
0	1

Next, multiply by the matrix:

[T_total] =

1	24221
0	1

⋅

1	28
0	1

=

1	24221 + 28
0	1

=

1	242 + 58821
0	1

=

1	83021
0	1

By comparing this result with the provided options, the correct T-parameters set aligns with:

[T] =

1.78	25.84
0.195	3.32

Thus, the correct answer is A.

61. (B): To find the unknown node voltage V₁ in the given circuit, we can use Kirchhoff's Current Law (KCL) at node V₁. According to KCL, the sum of currents entering a node is equal to the sum of currents leaving the node.

Identify the currents at node V₁:

• There is a current source of -8A entering the node.
• There is a current of 3A leaving the node.
• There is a current through the 4Ω resistor from V₁ to the 22V source.
• There is a current through the 3Ω resistor from V₁ to the reference node (0V).

Set up the KCL equation at node V₁:

-8A +

V₁ - 22V4Ω

+

V₁ - 0V3Ω

+ 3A = 0

Simplify the equation:

-8 + V₁ - 224 + V₁3 + 3 = 0

-5 + V₁ - 224 + V₁3 = 0

Multiply through by 12 (the last common multiple of 4 and 3) to clear the fractions:

-60 + 3(V₁ - 22) + 4V₁ = 0
-60 + 3V₁ - 66 + 4V₁ = 0
7V₁ - 126 = 60
7V₁ = 186
V₁ = 1867 ≈ 1.071V

Hence, the calculated voltage at node V₁ is approximately 1.071V.

62. (B): Ideal Current Source (CS): An ideal current source provides a constant current regardless of the voltage across it. The characteristic graph of an ideal current source is a vertical line at the value of the current it provides, indicating that the current remains constant even as the voltage varies.

Ideal Voltage Source (VS): An ideal voltage source provides a constant voltage regardless of the current flowing through it. The characteristic graph of an ideal voltage source is a horizontal line at the value of the voltage it provides, indicating that the voltage remains constant even as the current varies.

Let's examine the options:

• Option A: The graph shows a non-constant behaviour for both current and voltage sources, which is incorrect.
• Option B: The graph shows a vertical line for the current source and a horizontal line for the voltage source. This correctly represents the ideal behaviour of an ideal current source and an ideal voltage source.
• Option C: The graphs do not represent the ideal behaviours, showing oscillatory patterns that are incorrect.
• Option D: The graphs do not match the ideal behaviours of the sources, showing incorrect representations.

Therefore, the correct answer is B, as it accurately depicts the ideal current source with a vertical line and the ideal voltage source with a horizontal line.

63. (A): The output voltage V_o of the converter (IC 9400) is related to the input frequency F_in by the given equation:

V_o = V_ref · C_ref · R_int · F_in

The equation reflects the relationship where:

• V_ref is the reference voltage.
• C_ref is the reference voltage.
• R_int is the internal resistance.
• F_in is the input frequency.

The correct equation, provided in option A, indicates that the output voltage is directly proportional to the input frequency. As the input frequency increases, the output voltage increases linearly, assuming that the reference voltage, capacitance, and internal resistance are constants.

64. (D): For an inverting comparator circuit acting as a Schmitt Trigger, the hysteresis voltage V_hy is given by:

V_hy = R₁R₁ + R₂ [V_sat - (-V_sat)]

This equation can be derived by analyzing the feedback network of the Schmitt Trigger, where R₁ and R₂ form a voltage divider. The output voltage V_o can swing between +V_sat and -V_sat. The hysteresis voltage is the difference in the input voltage required to switch the output from one saturation level to the other.

The voltage at the inverting input of the op-amp (reference voltage) changes according to the output voltage and is given by the voltage divider formed by R₁ and R₂.

Thus, the value of the capacitor C for the oscillator operation at 1 kHz is 3.25 × 10^-9 F.

V_ref = R₁R₁ + R₂ V_o

When the output switches between +V_sat and -V_sat, the difference in reference voltage across the hysteresis range is:

V_hy = R₁R₁ + R₂ (V_sat - (-V_sat))

V_hy = R₁R₁ + R₂ (2V_sat)

Hence, the expression for the hysteresis voltage is correctly represented by option D.

65. (D):

For a FET-based phase shift oscillator operating at a frequency f = 1 kHz, we need to find the value of the capacitor C in the feedback network. The resistor R in the feedback network is given as 20 kΩ.

The frequency of oscillation for a phase shift oscillator is given by:

f = 12πRC√6

Rearranging this formula to solve for C:

C = 12πRf√6

Substituting the given values:
R = 20 × 10³ Ω
f = 1 × 10³ Hz

Now, calculate C:

C = 1 / (2π × 20×10³ × 1×10³ × √6)

C = 1 / (2π × 20×10⁶ × √6)

C = 1 / (2π × 20×10⁶ × 2.45)

C = 1 / (2π × 49 × 10⁶)

C = 1 / (307 × 10⁶)

C = 3.25 × 10^-9 F

66. (B):

To calculate the current I through each of the transistors Q₂ and Q₃ in the given circuit, we start by analyzing the control current I_control through the resistor connected to Q₁.

Determine I_control: The voltage across the base-emitter junctions of the transistors is given as V_BE = 0.7V. The voltage drop across the resistor R = 1 kΩ can be calculated by subtracting the base-emitter voltage from the supply voltage.

V_R = 6V - V_BE = 6V - 0.7V = 5.3V

Calculate I_control: Using Ohm's Law:

I_control = V_RR = 5.3V1kΩ = 5.3 mA

Since the circuit indicates that I through Q₂ and Q₃ is the same as I_control, each transistor Q₂ and Q₃ will have the current I equal to I_control.

Therefore, the current I through each of the transistors Q₂ and Q₃ is 5.3 mA.

67. (C):

To determine the bases x and y for the numbers (1235)_x and (3033)_y such that they are equal, we need to convert both numbers to a common base, typically base 10 and equate them.

1. Convert (1235)_x to base 10:
(1235)_x = 1 · x³ + 2 · x² + 3 · x¹ + 5 ċ x⁰
          = 1 · x³ + 2 · x² + 3 · x + 5

2. Convert (3033)_y to base 10:
(3033)_y = 3 · y³ + 0 · y² + 3 · y¹ + 3 · y⁰
          = 3 · y³ + 3 · y + 3

We equate the two expressions:
1 · x³ + 2 · x² + 3 · x + 5 = 3 · y³ + 3 · y + 3

We test each option to find the correct pair of bases:

Option A: x = 5 and y = 3
(1235)₅ = 1 · 5³ + 2 · 5² + 3 · 5 + 5
            = 125 + 50 + 15 + 5 = 195
(3033)₃ = 3 · 3³ + 3 · 3 + 3
            = 81 + 9 + 3 = 93
195 ≠ 93

Option B: x = 7 and y = 5
(1235)₇ = 1 · 7³ + 2 · 7² + 3 · 7 + 5
            = 343 + 98 + 21 + 5 = 467
(3033)₅ = 3 · 5³ + 3 · 5 + 3
            = 375 + 15 + 3 = 393
467 ≠ 393

Option C: x = 8 and y = 6
(1235)₈ = 1 · 8³ + 2 · 8² + 3 · 8 + 5
            = 512 + 128 + 24 + 5 = 669
(3033)₆ = 3 · 6³ + 3 · 6 + 3
            = 648 + 18 + 3 = 669
669 = 669

Option D: x = 9 and y = 7
(1235)₉ = 1 · 9³ + 2 · 9² + 3 · 9 + 5
            = 729 + 162 + 27 + 5 = 923
(3033)₇ = 3 · 7³ + 3 · 7 + 3
            = 1029 + 21 + 3 = 1053
923 ≠ 1053

Thus, the correct answer is C: x = 8 and y = 6.

68. (D):

To determine the sequence at the Q output for the J-K flip flop with the given conditions, we need to follow the behaviour of the J-K flip flop and analyze it through each clock pulse. Given the conditions J = Q and K = 1:

1. Initial State:

• Assume the flip flop is initially cleared, meaning Q = 0.

2. Behaviour of the J-K Flip Flop:

• When J = Q and K = 1, the J-K flip flop toggles its output.
• This means that if Q = 0, then J = 1 and the flip flop will toggle to Q = 1.
• If Q = 1, then J = 0 and the flip flop will toggle to Q = 0.

Let's go through the sequence for 6 clock pulses:

1. Pulse 1:

• Initial Q = 0, so J = 1.
• The flip flop toggles: Q = 1.

2. Pulse 2:

• Current Q = 1, so J = 0.
• The flip flop toggles: Q = 0.

3. Pulse 3:

• Current Q = 0, so J = 1.
• The flip flop toggles: Q = 1.

4. Pulse 4:

• Current Q = 1, so J = 0.
• The flip flop toggles: Q = 0.

5. Pulse 5:

• Current Q = 0, so J = 1.
• The flip flop toggles: Q = 1.

6. Pulse 6:

• Current Q = 1, so J = 0.
• The flip flop toggles: Q = 0.

Thus, the sequence of Q for 6 pulses is:
Q = 0 1 0 1 0 1

This sequence matches the option D.

Explanation for Incorrect Options:

• Option A (010000): Incorrect because it does not account for toggling behaviour after each pulse correctly.

• Option B (011001): Incorrect as it incorrectly represents the toggling sequence.
• Option C (010010): Incorrect as it fails to toggle the output after each pulse.

Therefore, the correct answer is D: 010101.

69. (B):

To realize the Boolean function Y = AB + CD using only 2-input NAND gates, we need to first understand the transformations required to convert basic AND, OR and NOT operations using NAND gates.

1. NAND Gate Basics:

• A NAND gate can be used to create the NOT, AND, and OR operations:
• NOT operation: A = NAND(A, A)
• AND operation: A · B = NAND(A, B)
• OR operation: A + B = A · B

2. Function Y = AB + CD

• This function is an OR operation between two AND operations:
• Y = (A · B) + (C · D)

3. Implementing AND operations using NAND gates:

• A · B = NAND(A, B)
• Therefore, the AND gate requires one NAND gate followed by a NAND gate for NOT:
• AND(A, B) = NAND(NAND(A, B), NAND(A, B))

4. Implementing OR operation using NAND gates:

• Using De Morgan's theorem, A + B = A · B
• This requires three NAND gates:
• First, invert both input using NAND gates: A = NAND(A, A) and B = NAND(B, B)
• Then, apply NAND to these inverted inputs: OR(A, B) = NAND(A, B)

Let's break down the steps to implement Y = AB + CD:

1. Create A · B:

• Use two NAND gates:
• First NAND gate for AND operation: N1 = NAND(A, B)
• Second NAND gate for NOT operation: N2 = NAND(N1, N1)
• Result: A · B = N2

2. Create C · D:

• Use two NAND gates:
• Third NAND gate for AND operation: N3 = NAND(C, D)
• Fourth NAND gate for NOT operation: N4 = NAND(N3, N3)
• Result: C · D = N4

3. OR operation (A · B) + (C · D):

• Use three NAND gates:
• Fifth NAND gate to invert A · B: N5 = NAND(N2, N2)
• Sixth NAND gate to invert C · D: N6 = NAND(N4, N4)
• Seventh NAND gate for the final OR operations: N7 = NAND(N5, N6)

Total number of NAND gates used: 2 (for A · B) + 2 (for C · D) + 3 (for OR operation) = 7 gates.

However, a more efficient configuration can be found as follows:

• Combine steps 1 and 2 using direct NAND outputs without requiring extra inverters: 1 gate for A · B and 1 gate for C · D.
• Final OR operation using 1 additional gate combining results from the two AND outputs directly.

Therefore, the correct minimum number of 2-input NAND gates required is: B. 3 gates.

70. (D):

To simplify the given Boolean function Y = F(A, B, C, D) using a Karnaugh map (K-map), we will map the given minterms

and don't-care terms onto a 4-variable K-map and find the minimal Sum of Products (SOP).
Given: Y = Σm(0, 2, 3, 6, 7) + Σd(8, 10, 11, 15)

1. Create the K-map:

AB/CD	00	01	11	10
00	1	1	x	x
01	x	x	x	x
11	1	x	x	x
10	1	x	x	x

Here, x represents the don't care terms.

2. Map the Minterms and don't-care terms:

AB/CD	00	01	11	10
00	1	1	x	x
01	x	x	x	x
11	1	1	x	x
10	1	x	x	x

3. Group the 1s and don't-cares:

• Group 1: The four 1s in the first columns (columns 00 and 01).
• Group 2: The two 1s in the last row (row 10, columns 00).

4. Determine the minimal SOP:

• Group 1 covers cells (0, 2, 3, 6, 7): A'C
• Group 2 covers cells (8, 10): B'D'

Thus, the simplified minimal SOP is:
Y = A'C + B'D'

71. (B):

In the 8051 microcontroller, the Program Status Word (PSW) register contains various flags and status bits that are used to control the operation of the microcontroller and to provide information about the result of arithmetic operations. The conditional flags in the PSW are those that are directly affected by the results of operations and are used to make decisions in conditional instructions.

The PSW register in the 8051 contains the following conditional flags:

• 1. Carry Flag (CY): Set if there is a carry out from the most significant bit during an addition operation or a borrow during a subtraction operation.
• 2. Auxiliary Carry Flag (AC): Set if there is a carry out from the 3rd bit to the 4th bit during addition or a borrow during subtraction. This flag is used for Binary-Coded Decimal (BCD) operations.
• 3. Parity Flag (P): Set if the number of 1s in the accumulator is even, otherwise, it is cleared.
• 4. Overflow Flag (OV): Set if there is a signed overflow, meaning the result of an operation exceeds the capacity of the register in terms of signed arithmetic.

These four conditional flags are used to control program flow and make decisions based on the results of arithmetic and logical operations.

72. (D):

The 8051 microcontroller has an internal RAM space of 128 bytes, addressed from 00H to 7FH. This memory space is divided into different sections with specific uses. The lower 32 bytes (00H to 1FH) are bit-addressable, but the bi-addressable area typically refers to the section that can be accessed as either bytes or bits. In the 8051, the bit-addressable area is the range from 20H to 2FH. This is a unique feature of the 8051's internal RAM, where each byte in this range can be accessed either as a whole byte or as individual bits. This makes it useful for applications that require bit-level manipulation, such as controlling individual bits in hardware registers or flags.

73. (A):

In the 8086 microprocessor, the AAD (ASCII Adjust AX Before Division) instruction is used to adjust the result of a division operation to unpacked BCD format.

After the execution of the AAD instruction, certain flags in the flag register are affected, while others remain undefined.

Impact of AAD on Flags:

• Sign flag (S): This flag is set or cleared based on the result of the adjustment operation. If the most significant bit of the result is 1, the Sign flag is set.
• Zero flag (Z): This flag is set if the result of the adjustment is zero; otherwise, it is cleared.
• Parity flag (P): This flag is set if the number of 1-bits in the least significant byte of the result is even; otherwise, it is cleared.
• Carry flag (C): This flag remains undefined after the execution of the AAD instruction. The AAD instruction does not affect the carry flag, and its state is not predictable based on the execution of this instruction.

Thus, the correct answer is A: Carry flag.

74. (B):

To determine the value of the register AL after executing the given assembly language program for the 8086 microprocessor, let's go through the steps:

Given,

• Initial values: AL = 53₁₆ and CL = 29₁₆

Step-by-Step Execution:

1. ADD AL, CL:

• Perform the addition of AL and CL:
  53₁₆ + 29₁₆ = 7C₁₆
• After this instruction, AL = 7C₁₆.

2. DAD (Decimal Adjust AL after Addition):

• The DAA instruction adjusts the contents of AL to create a correct BCD result after a binary addition.
• In this case, the addition result 7C₁₆ (which is 0111 1100₂) is already a valid BCD number and doesn't require adjustment.

• The DAA instruction does not change 7C₁₆ since the lower nibble (C) is greater than 9.

Thus, the value of AL remains unchanged at 7C₁₆.

However, considering that the DAA might affect the result if AL had carried over a higher nibble, let's reconsider.

Given AL = 53₁₆ and CL = 29₁₆:

1. ADD AL, CL:

• Binary addition: 53₁₆ + 29₁₆ = 7C₁₆.

2. DAA:

• In BCD, if the lower nibble (4 bits) of AL is greater than 9 or if the Auxiliary Carry (AC) is set, 6 is added to the lower nibble.
• Similarly, if the upper nibble of AL is greater than 9 or if the carry flag (CF) is set, 6 is added to the upper nibble.

Here, AL = 7C₁₆, with a lower nibble of C, which is greater than 9.
Thus:

• Adjust lower nibble: C₁₆ + 6₁₆ = 12₁₆
• The lower nibble now is 2, and the carry from the lower nibble addition affects the upper nibble.

So, the value of AL after DAA become 82₁₆.

Therefore, the correct value in the AL register after executing the instructions is B: 82₁₆.

75. (D):

A reflex Klystron is a type of vacuum tube used in microwave electronics to generate or amplify high-frequency signals. The operation of a reflex Klystron relies on the concept of feedback and oscillation. For sustained oscillation to occur in any feedback system, including the reflex Klystron, certain conditions must be met, known as the Barkhausen criteria.

The Barkhausen criteria state:

1. The loop gain must be equal to 1 (magnitude of the product of gains around the loop must be 1).

2. The total phase shift around the feedback loop must be a multiple of 2π radians.

Option D (The loop gain is 1 and phase shift is a multiple of 2π) correctly satisfies the Barkhausen criteria. The loop gain of 1 ensures that the signal is neither amplified nor attenuated, and the phase shift being a multiple of 2π ensures that the feedback signal is in phase with the original signal, leading to constructive interference and sustained oscillation.

Thus, the correct answer is D.

76. (A):

To determine the minimum Pulse Repetition Frequency (PRF) for an X band radar operating at 12 GHz to unambiguously measure the wind velocity in a tornado with a wind speed of 360 km/h, we need to use the Doppler effect and the relationship between the radar frequency, wind speed, and PRF.

Wind Speed = 360 km/h
               = 360 × 10003600 m/s = 100 m/s

The Doppler frequency shift for a moving target is given by:

f_d = 2 × v × fc

Where:
• v is the target velocity in m/s.
• f is the radar frequency.
• c is the speed of light (3 × 10⁸ m/s).

Given: v = 100 m/s;
            f = 12 GHz = 12 × 10⁹ Hz

∴ f_d = 2 × 100m/s × 12 × 10⁹ Hz3 × 10⁸ m/s

f_d = 2400 × 10⁹3 × 10⁸

f_d = 8000 Hz = 8 kHz

To avoid ambiguity, the PRF must be at least twice the Doppler frequency shift (Nyquist rate):

Minimum PRF = 2 × f_d
                  = 2 × 8 kHz
                  = 16 kHz

Thus, the minimum Pulse Repetition Frequency that can be used to unambiguously measure the wind velocity in a tornado with a wind speed of 360 km/h for an X band radar operating at 12 GHz is 16 kHz.

77. (C):

The Laplace equation in cylindrical coordinates (ρ, φ, z) for a scalar potential function V is given by:

∇²V = 1ρ ∂∂ρ (ρ ∂V∂ρ) + 1ρ² ∂²V∂φ² + ∂²V∂z² = 0

• The Laplace equation is a second-order partial differential equation often used in electromagnetics, fluid dynamics, and other fields.
• In cylindrical coordinates, the Laplacian operator ∇² takes a specific form that includes derivatives with respect to the radial distance ρ, the azimuthal angle φ, and the axial distance z.

Let's break down the terms:

1. Radial component (ρ): 1ρ ∂∂ρ (ρ ∂V∂ρ)
2. Azimuthal component (φ): 1ρ² ∂²V∂φ²
3. Axial component (z): ∂²V∂z²

Given these components, the correct expression for the Laplace equation in cylindrical coordinates combines all three terms:

Thus, the correct answer is C:

∇²V = 1ρ ∂∂ρ (ρ ∂V∂ρ) + 1ρ² ∂²V∂φ² + ∂²V∂z² = 0.

78. (C): To determine the electric field E at a radius of 3 m from a uniform line charge of λ = 8 nC/m lying along the z-axis, we use the formula for the electric field due to an infinite line charge in cylindrical coordinates.

For an infinite line charge, the electric field at a distance r from the line charge is given by:

E =

λ2π ε₀ r

where:

• λ is the line charge density.
• ε₀ is the permittivity of free space (ε₀ = 8.854 × 10^-12 F/m).
• r is the radial distance from the line charge.

Given:   λ = 8 nC/m = 8 × 10^-9 C/m
            r = 3 m

Electric Field:

E =

8×10^-9 C/m2π × 8.854 × 10^-12 F/m × 3 m

⇒   E =

8×10^-92π × 8.854 × 10^-12 × 3

⇒   E =

8×10^-96π × 8.854 × 10^-12

⇒   E =

8×10^-96 × 3.1416 × 8.854 × 10^-12

⇒   E =

8×10^-9167.554 × 10^-12

⇒   E =

8×10^-91.67554 × 10^-10

∴   E = 47.75 V/m

The direction of the electric field is radially outward from the line charge, denoted by the unit vector a_ρ.

Thus, the electric field E at a radius of 3 m from the uniform line charge is approximately 47.9 a_ρ V/m.
So, the correct answer is C: 47.9 a_ρ V/m.

79. (B): To determine the minimum receivable signal power (P_min) in a radar receiver, we use the formula for the noise power:

P_min = kTB · F

where:

• k is Boltzmann's constant (k = 1.38 × 10^-23 J/K).
• T is the temperature in Kelvin (T = 290 K).
• B is the bandwidth in Hz (B = 25 × 10⁶ Hz).
• F is the noise figure in linear terms.

The noise figure in dB is given as 9 dB. To convert it to a linear scale:

F = 10

910

   = 10^0.9 ≈ 7.943

P_min = kTB · F

Substitute the value into the equation:

P_min = (1.38 × 10^-23 J/K)
       × (290 K) × (25 × 10⁶ Hz)
       × 7.943

       = 1.38 × 290 × 25
       × 10⁶ × 7.943 × 10^-23

       = 1.38 × 290 × 25
       × 7.943 × 10⁶ × 10^-23

P_min = 79489.415 × 10⁶ × 10^-23
P_min = 7.9489415 × 10^-14

Therefore, the minimum receivable signal in the radar receiver is approximately:
    P_min = 6.946 × 10^-14 W
So, the correct answer is B: 6.946 × 10^-14 W.

80. (C): To determine the total power in the Am signal, we need to use the following formula for the total power of an Amplitude Modulated (AM) signal:

P_total = P_c (1 +

m²2

)

where:

• P_c is the carrier power.
• m is the modulation index.

The carrier power P_c can be calculated using the peak carrier voltage V_c and the load resistance R:

P_c = V_c²2R

Given: V_c = 150 V; R = 200 Ω

Then,    P_c = (150)²2 × 200

             P_c = 22500400

             P_c = 56.25 W

Total Power:

P_total = P_c (1 + m²2)

P_total = 56.25 (1 + (0.5)²2)

P_total = 56.25 (1 + 0.252)

P_total = 56.25(1 + 0.125)
P_total = 56.25 × 1.25
P_total = 63.28 W

Thus, the total power in the AM signal is 63.28 W.
Therefore, the correct answer is C: 63.28 W.

81. (B):

In frequency modulation (FM), the total transmitted power remains constant. This is because in FM, the energy of the signal is spread between the carrier and the multiple sidebands generated. Unlike amplitude modulation (AM), where the power of the modulated signal can vary with the depth of modulation, in FM, this depth affects the bandwidth of the signal but not the total power. Increasing the frequency deviation (depth of modulation) results in an increased bandwidth requirement, according to Carson's rule, which states that the total bandwidth in FM is approximately 2(Δf + f_m), where Δf is the peak deviation frequency, and f_m is the highest frequency in the modulating signal. For instance, if Δf is 75 kHz and f_m is 15 kHz, the total bandwidth would be 180 kHz.

82. (C):

The modulation index (m) of an amplitude modulated (AM) wave is given by the formula:

m = V_max - V_minV_max + V_min

Here, V_max represents the maximum amplitude of the modulated wave, and V_min represents the minimum amplitude of the modulated wave. The modulation index indicates the extent of modulation in an AM signal and is crucial in determining the quality and efficiency of the transmission.

To understand why this formula is correct, consider that in an AM wave, the modulating signal causes the amplitude of the carrier wave to vary. The modulation index can be derived from the envelope of the AM wave, which reaches its maximum and minimum values due to this variation.

By taking the difference between the maximum and minimum amplitudes and dividing it by the sum of these amplitudes, we obtain a normalized value (the modulation index) that ranges from 0 to 1 for undermodulation (when m < 1), exactly 1 for 100% modulation, and greater than 1 for overmodulation (which leads to distortion).

Therefore, the correct formula for the modulation index is:

m = V_max - V_minV_max + V_min

which is option C.

Q83

In a two-transistor model (Darlington pair), the overall current gain is:

α_total = α₁ + α₂ − (α₁ × α₂)

Since α₁ and α₂ are close to 1, their product is negligible:

α₁ + α₂ ≈ 1

Answer: C

Q84

For a three-phase full-wave rectifier:

V_avg = (3√3 V_m cosα) / (2π)

At α = 0:

V_avg = (3√3 V_m) / (2π)

Answer: C

Q85

A system is stable if all roots have negative real parts.

If any root has a positive real part → system is unstable.

Unbounded impulse response also indicates instability.

Answer: D

Q86

Transfer function:

C(s)/R(s) = G₁G₂ + G₂ + 1

Answer: D

Q87

Force summing devices combine applied forces into a resultant force and convert it into displacement.

Used in mechanical systems like weighing scales and suspension systems.

Answer: A

Q88

Given:

• FSD current (Iₘ) = 300 μA
• Meter resistance (Rₘ) = 75 Ω
• Desired current (I) = 5 A

Voltage across meter:

Vₘ = Iₘ × Rₘ = 300 × 10⁻⁶ × 75 = 0.0225 V

Shunt current:

Iₛ = I − Iₘ ≈ 5 A

Shunt resistance:

Rₛ = Vₘ / Iₛ = 0.0225 / 5 = 0.0045 Ω

Answer: C

Q89

A transducer converts non-electrical quantities into electrical signals.

Examples: thermocouple, piezoelectric sensor.

Answer: C

Q90

Given:

• Iₘ = 1 mA
• Rₘ = 125 Ω
• V = 1 V

Series resistance:

Rₛ = (V / Iₘ) − Rₘ = (1 / 0.001) − 125 = 875 Ω

Answer: C

Q.115

(A) It is an AC bridge to measure frequency

True.
The Wien bridge is an AC bridge used for accurate frequency measurement.

---

(B) It is a DC bridge to measure amplitude

False.
Wien Bridge works with AC signals, not DC.

---

(C) It is used as frequency determining element

True.
In Wien bridge oscillators, the RC network sets the oscillation frequency.

---

(D) It is used as band-pass filter

Partially misleading.
The Wien bridge network acts like a band-pass filter in the oscillator, but the bridge itself is not typically described this way.
Exam questions usually mark this as False.

---

(E) It is used as notch filter

False.
That is the Wien NOTCH bridge, a different configuration.

---

Correct combination: (A) and (C) Only

Correct Answer: Option (1)

Q.116

Match List–I with List–II

List–I (Device)	List–II (Characteristic/Feature)
(A) MODFET	(I) Voltage controller resistor
(B) MOSFET	(II) Fill factor
(C) Solar cell	(III) PN junction placed back to back
(D) JFET	(IV) Two dimensional electron gas

Options:

1. (A)–(IV), (B)–(III), (C)–(II), (D)–(I)
2. (A)–(I), (B)–(II), (C)–(III), (D)–(IV)
3. (A)–(IV), (B)–(I), (C)–(II), (D)–(III)
4. (A)–(III), (B)–(I), (C)–(IV), (D)–(II)

Detailed Explanation:

• (A) MODFET: Also known as HEMT, this device uses a heterojunction structure to create a triangular quantum well. This confines electrons to a very thin layer, creating a Two-dimensional electron gas (2DEG), which allows for high electron mobility.
  Match: (A) → (IV)


• (B) MOSFET: An enhancement-mode MOSFET typically consists of two n-doped regions (Source and Drain) separated by a p-doped substrate. This structure effectively forms two PN junctions placed back to back, which blocks current flow when the device is off.
  Match: (B) → (III)


• (C) Solar cell: A primary figure of merit for solar cell efficiency is the Fill factor. It represents the ratio of maximum power to the product of open-circuit voltage and short-circuit current.
  Match: (C) → (II)


• (D) JFET: In its ohmic or linear region (small drain-to-source voltage), the JFET behaves such that the resistance between the drain and source is controlled by the gate voltage. It acts as a Voltage controlled resistor.
  Match: (D) → (I)

Correct Answer: Option (1)

(A)–(IV), (B)–(III), (C)–(II), (D)–(I)

Q.117

Let's match each item logically:

List–I → List–II

• (A) Annealing → (IV) Crystal restoration
  Annealing repairs crystal damage and restores lattice structure.
• (B) Sealing → (III) Packing density
  Sealing processes improve packing density or surface sealing.
• (C) Ion implantation → (II) Doping
  Ion implantation is a standard method for doping semiconductors.
• (D) Oxidation → (I) Isolation
  Oxide layers are used for electrical isolation.

Correct option: (4)

(A)-(IV), (B)-(III), (C)-(II), (D)-(I)

Q.118

Let's analyze and solve the question.

List-I (Sequence x[n])

• (A) \( e^{i \omega_0 n} x[n] \)
• (B) \( n x[n] \)
• (C) \( x[n] - x[n-1] \)
• (D) \( \delta[n - n_0] \)

List-II (Fourier Transform X(Ω))

• (I) \( (1 - e^{-i \Omega}) \times (\Omega) \)
• (II) \( X(\Omega - \Omega_0) \)
• (III) \( e^{-i \Omega n_0} \)
• (IV) \( \frac{dX(\Omega)}{d\Omega} \)

Matching the sequences with their Fourier Transforms:

1. For \( e^{i \omega_0 n} x[n] \):
   • Multiplying the sequence \( x[n] \) by a complex exponential will shift its Fourier transform by \( \omega_0 \). This corresponds to the Fourier transform of \( x[n] \) shifted by \( \Omega_0 \), i.e., (II).
2. For \( n x[n] \):
   • This corresponds to the differentiation of the Fourier transform with respect to \( \Omega \), i.e., (IV).
3. For \( x[n] - x[n-1] \):
   • This is a difference of two consecutive samples, which corresponds to multiplying the Fourier transform by \( (1 - e^{-i \Omega}) \). This matches with (I).
4. For \( \delta[n - n_0] \):
   • The Fourier transform of a shifted delta function is simply a phase shift \( e^{-i \Omega n_0} \), which corresponds to (III).

Final Answer:

• (A) \( e^{i \omega_0 n} x[n] \) → (II) \( X(\Omega - \Omega_0) \)
• (B) \( n x[n] \) → (IV) \( \frac{dX(\Omega)}{d\Omega} \)
• (C) \( x[n] - x[n-1] \) → (I) \( (1 - e^{-i \Omega}) \times (\Omega) \)
• (D) \( \delta[n - n_0] \) → (III) \( e^{-i \Omega n_0} \)

Thus, the correct answer is Option (2):
(A)-(II), (B)-(IV), (C)-(I), (D)-(III).

Q.119

Match List-I with List-II

List-I (Feedback Connection Type)

• (A) Voltage series feedback
• (B) Voltage shunt feedback
• (C) Current series feedback
• (D) Current shunt feedback

List-II (Input/Output Impedance)

• (I) Z_of = Z_o / (1 + βA)
• (II) Z_of = Z_o(1 + βA)
• (III) Z_if = Z_i / (1 + βA)
• (IV) Z_if = Z_i(1 + βA)

Detailed Explanation

1. General Effects of Feedback on Impedance:

• Sampling (Output side):
  • Voltage Sampling (Shunt output) → Decreases Output Impedance (Z_of = Z_o / (1 + βA))
  • Current Sampling (Series output) → Increases Output Impedance (Z_of = Z_o(1 + βA))
• Mixing (Input side):
  • Series Mixing (Voltage addition) → Increases Input Impedance (Z_if = Z_i(1 + βA))
  • Shunt Mixing (Current addition) → Decreases Input Impedance (Z_if = Z_i / (1 + βA))

Matching Analysis

List-I Item	Topology Effect	Matches List-II
(A) Voltage Series	Series Input (High Zin) / Shunt Output (Low Zout)	Matches (IV): Zif = Zi(1 + βA)
(B) Voltage Shunt	Shunt Input (Low Zin) / Shunt Output (Low Zout)	Matches (I): Zof = Zo / (1 + βA)
(C) Current Series	Series Input (High Zin) / Series Output (High Zout)	Matches (II): Zof = Zo(1 + βA)
(D) Current Shunt	Shunt Input (Low Zin) / Series Output (High Zout)	Matches (III): Zif = Zi / (1 + βA)

Correct Option: (2) (A)-(IV), (B)-(I), (C)-(II), (D)-(III)

Q.120

Matching Logic Devices with Their Characteristics

List - I

• (A) EPROM
• (B) PLA (Programmable Logic Array)
• (C) Generic Array Logic (GAL)
• (D) PAL (Programmable Array Logic)

List - II

• (I) AND gate programmable OR gate permanently wired
• (II) Both AND and OR gates are programmable
• (III) AND gate programmable, output permanently hard wired but may be taken through register or tristate gate programmable
• (IV) AND gate permanently hard wired OR gate programmable

Explanation of Terms

• EPROM: Erasable Programmable Read-Only Memory (not a logic device, but a memory device). It is typically fixed logic, so the best fit is usually the option where both AND and OR gates are programmable — this matches the flexibility of PLA.
• PLA (Programmable Logic Array): Both AND and OR planes are programmable. So PLA matches (II).
• GAL (Generic Array Logic): It is a type of PAL with some enhancements, typically has AND gate programmable, output permanently hardwired but can be taken through register or tristate gate programmable. Matches (III).
• PAL (Programmable Array Logic): AND gate programmable, OR gate fixed (permanently wired). Matches (I) or (IV). Usually, PAL has programmable AND and fixed OR gate, which is (I).

Matching

• (A) EPROM → (IV) — Usually EPROM is not logic programmable but memory. Here, considering the options, the only option left that fits is (IV) AND gate permanently hard wired OR gate programmable (or fixed). Though EPROM is memory, in this question's context, it seems to fit this definition.
• (B) PLA → (II) Both AND and OR gates programmable
• (C) GAL → (III) AND gate programmable, output permanently hard wired but may be taken through register or tristate gate programmable
• (D) PAL → (I) AND gate programmable OR gate permanently wired

Answer

(3) (A)-(IV), (B)-(II), (C)-(III), (D)-(I)

Q.121

List–I (Instructions) Analysis

(A) MOV BX, AX
Both operands are registers → Register Addressing (III)

(B) MOV AX, 50H[BX]
A displacement added to a register (BX) → Register Relative Addressing (I)

(C) MOV AX, [BX]
Operand is in memory pointed to by BX → Register Indirect Addressing (IV)

(D) MOV AX, [2000H]
Operand stored at a direct memory address → Direct Addressing (II)

---

Correct Matching

Instruction	Addressing Mode
(A)	(III)
(B)	(I)
(C)	(IV)
(D)	(II)

---

Correct Option: (3)

(A)-(III), (B)-(I), (C)-(IV), (D)-(II)

Q.122

Matching Microwave Devices with Names

List I (Microwave Devices) and List II (Name of Device):

1. Microwave transistor (A):
   • A Microwave transistor is a device used for amplification in microwave circuits. The most common type of microwave transistor is the HBT (Heterojunction Bipolar Transistor).
   • Therefore, (A) → (IV).
2. Field effect transistor (B):
   • A Field effect transistor (FET), typically used in microwave applications, is often associated with InP diodes (Indium Phosphide), which are known for their high-speed performance and are often used in high-frequency applications.
   • Therefore, (B) → (II).
3. Transferred electron device (C):
   • A Transferred electron device (such as the Gunn diode) is a microwave device that is commonly associated with Read diodes, which operate based on transferred electrons for microwave generation.
   • Therefore, (C) → (III).
4. Avalanche transit time device (D):
   • An Avalanche transit time device (like the IMPATT diode) is typically used with a CCD (Charge-Coupled Device).
   • Therefore, (D) → (I).

Correct Matching:

The correct matching is:

• (A) → (IV): Microwave transistor corresponds to HBT (Heterojunction Bipolar Transistor).
• (B) → (II): Field effect transistor corresponds to InP diodes.
• (C) → (III): Transferred electron device corresponds to Read diode.
• (D) → (I): Avalanche transit time device corresponds to CCD.

Answer:

The correct answer is Option (2)

Q.123

Correct Answer: Option (1)

Q.124

Matching Transducers and Units

List I (Concepts) and List II (Units):

1. Electrical resistance (A):
   • Electrical resistance is typically measured in ohms (Ω). Its unit is (V/A) (Voltage per Ampere), which is a standard unit for resistance.
   • So, (A) → (IV).
2. Thermal resistance (B):
   • Thermal resistance measures the ability of a material to resist the flow of heat. Its unit is typically in °C/W, which means degrees Celsius per watt (temperature change per unit heat flow).
   • So, (B) → (I).
3. Time constant (C):
   • The time constant (τ) in an RC circuit is the product of the resistance (R) and the capacitance (C). The unit of time constant is given by (RC), which is time (seconds).
   • So, (C) → (III).
4. Rate of heat transfer (D):
   • The rate of heat transfer (also known as thermal power) is typically measured in watts (W), which represents energy per unit time.
   • So, (D) → (II).

Correct Matching:

The correct matching is:

• (A) → (IV): Electrical resistance corresponds to (V/A).
• (B) → (I): Thermal resistance corresponds to (°C/W).
• (C) → (III): Time constant corresponds to (RC).
• (D) → (II): Rate of heat transfer corresponds to (W).

Answer:

The correct answer is Option (4): (A)-(IV), (B)-(I), (C)-(III), (D)-(II).

Q.125

Matching Transducers and Applications

List I (Transducers) and List II (Typical Applications):

1. Potentiometric device (A):
   • A potentiometric device is typically used for measuring displacement, as it works by varying the resistance based on position changes.
   • The application for potentiometric devices is displacement.
   • So, (A) → (III).
2. Resistance hygrometer (B):
   • A resistance hygrometer measures the relative humidity by detecting changes in resistance as the moisture content in the air varies.
   • Therefore, (B) → (I).
3. Dielectric gauge (C):
   • A dielectric gauge measures thickness using the principle of capacitance, as the dielectric constant of materials changes with thickness.
   • Therefore, (C) → (IV).
4. Moving coil generator (D):
   • A moving coil generator is used for measuring velocity, often used in tachometers.
   • So, (D) → (II).

Final Answer:

The correct matching is:

(A) → (III), (B) → (I), (C) → (IV), (D) → (II)

Answer Option:

Option (3):

Q.126

Concept of Diffusivity: Diffusivity refers to how fast a substance spreads or moves through another medium. In the context of semiconductors and materials science, the diffusivity of dopants (like Boron, Arsenic, etc.) plays a critical role in processes such as doping in semiconductor fabrication. Generally, smaller atoms tend to diffuse more quickly than larger atoms, and elements with lower atomic weights tend to have higher diffusivity. Boron is a small atom and generally has a high diffusivity in semiconductor materials.

Correct Answer: Option (2)

Q.127

The Debye Length Problem Solution

Problem Analysis:

The Debye length (λ_D) is inversely proportional to the square root of the doping density (N). This means that as N increases, the Debye length decreases, and vice versa.

The formula for the Debye length is:

λ_D ∝ 1 / √N

Where:

• N is the doping density (in cm^-3).

Understanding the Doping Densities:

We are given the following doping densities:

• (A) N = 10¹⁵ cm^-3
• (B) N = 10¹⁷ cm^-3
• (C) N = 3 × 10¹⁵ cm^-3
• (D) N = 10¹⁶ cm^-3
• (E) N = 5 × 10¹⁶ cm^-3

Step-by-step Solution:

• Doping density (B) is the largest value, 10¹⁷ cm^-3, so it will result in the smallest Debye length.
• Doping density (E) is the second largest, 5 × 10¹⁶ cm^-3, so the Debye length will be slightly larger than for (B), but smaller than for the other values.
• Doping density (D) is 10¹⁶ cm^-3, smaller than (B) and (E), so its Debye length will be larger than those.
• Doping density (A) is 10¹⁵ cm^-3, which is smaller than (B), (E), and (D), so the Debye length will be larger than the previous ones.
• Doping density (C) is 3 × 10¹⁵ cm^-3, which is very close to (A), so its Debye length will be similarly large.

Order of Doping Density and Debye Length:

The doping densities, from maximum Debye length to minimum, are:

1. A (10¹⁵ cm^-3)
2. C (3 × 10¹⁵ cm^-3)
3. D (10¹⁶ cm^-3)
4. E (5 × 10¹⁶ cm^-3)
5. B (10¹⁷ cm^-3)

Answer:

The correct order is (A), (C), (D), (E), (B).

Thus, the correct answer is option:

(1) (B), (E), (D), (C), (A)

Q.128

The time constant τ=R⋅C

Correct Answer: Option (4)

Q.129

To arrange the stability factor (S_I) in descending order, recall that for an emitter-bias BJT:

S_I = (1 + β) / [1 + (β + 1)(R_E/R_B)]

Thus:

• Smaller (R_E/R_B) → larger stability factor S_I
• Larger (R_E/R_B) → smaller stability factor S_I

Computed values of (R_E/R_B):

Option	Given Relation	RE/RB
A	RE = 0.1 RB	0.1
B	RB = 60 RE	1/60 ≈ 0.0167
C	RB = 100 RE	1/100 = 0.01
D	RE = 10 RB	10
E	RB = 30 RE	1/30 ≈ 0.0333

Order of decreasing stability factor (S_I):

C > B > E > A > D

Correct option:

Option (2): (C), (B), (E), (A), (D)

Q.130

In this problem, you are asked to arrange the given logic family voltage terms in the correct sequence. Let's analyze each term:

Definitions:

• (A) V_{OH} is the maximum output high-level voltage.
• (B) V_{OL} is the maximum input low-level voltage.
• (C) V_{IH} is the minimum input acceptable high-level voltage.
• (D) V_{IL} is the minimum acceptable input low-level voltage.

Sequence of Terminologies:

When we arrange these terms based on the usual convention of how voltage levels are defined in logic families, the typical sequence is as follows:

1. (C) V_{IH}: This is the minimum input voltage that is still considered a "high" logic level (input).
2. (A) V_{OH}: This is the maximum output voltage that is considered "high" from the logic gate.
3. (D) V_{IL}: This is the minimum input voltage that is still considered a "low" logic level (input).
4. (B) V_{OL}: This is the maximum output voltage that is still considered a "low" logic level.

Thus, the correct sequence of these voltage levels in a typical logic family is:

(C), (A), (D), (B)

Final Answer:

The most appropriate answer is:

Option (1): (C), (A), (D), (B)

This order is based on the typical voltage conventions used in digital logic families.

Q.131

The question asks to arrange the interrupts of the 8051 microcontroller in order of priority upon reset. The given interrupts are:

• (A) INT 0 (External Interrupt 0)
• (B) INT 1 (External Interrupt 1)
• (C) TF 0 (Timer 0 Overflow Interrupt)
• (D) TF 1 (Timer 1 Overflow Interrupt)
• (E) (R1 + T1) (Serial Communication Interrupt)

8051 Interrupt Priorities:

In the 8051 microcontroller, the interrupt priorities are defined as follows:

1. INT 0 (External Interrupt 0) has the highest priority.
2. INT 1 (External Interrupt 1) comes next.
3. Timer 0 overflow (TF 0) has a lower priority.
4. Timer 1 overflow (TF 1) has a lower priority than Timer 0.
5. Serial communication interrupt (R1 + T1) has the lowest priority.

Interrupt Priority Order:

• INT 0 has the highest priority, followed by INT 1.
• Then, we have the timer interrupts: TF 0 and TF 1.
• Finally, the serial communication interrupt (R1 + T1) has the lowest priority.

Correct Sequence:

• (A) INT 0 > (B) INT 1 > (C) TF 0 > (D) TF 1 > (E) (R1 + T1)

Final Answer:

The most appropriate answer is:

Option (2)

This option correctly represents the priority of interrupts in the 8051 microcontroller.

Q.132

Let's analyze the given materials with respect to their relative dielectric constants. The materials are:

• (A) Ge (Germanium)
• (B) C (Carbon)
• (C) CdS (Cadmium Sulfide)
• (D) TiO₂ (Titanium Dioxide)

Dielectric Constants:

• Germanium (Ge): Germanium is a semiconductor material, and its dielectric constant is relatively high compared to typical insulators but lower than that of certain ceramics. Its value is around 16.
• Carbon (C): Carbon, in its graphite or other common forms, is a conductor, and its dielectric constant is relatively low compared to insulators. Its value is around 2-5 depending on the form (graphite, diamond, etc.).
• CdS (Cadmium Sulfide): This is a semiconductor material with a moderate dielectric constant. Its value is around 10.
• TiO₂ (Titanium Dioxide): Titanium Dioxide is a ceramic material known for its high dielectric constant. Its value is around 80.

Arranging the Materials in Descending Order of Dielectric Constants:

• TiO₂ (D) has the highest dielectric constant (~80).
• Ge (A) follows with a dielectric constant of around 16.
• CdS (C) comes next with a value around 10.
• C (B) has the lowest dielectric constant, around 2-5.

Correct Sequence:

• (D) TiO₂ > (A) Ge > (C) CdS > (B) C

Final Answer:

The correct order is:

Option (2)

Q.133

Let's analyze the steps for the FM transmitter's blocks in the correct sequence.

FM Transmitter Block Diagram Overview:

The FM transmitter consists of the following blocks:

• (A) Crystal Oscillator
• (B) Antenna
• (C) Frequency Multiplier
• (D) Phase Modulate/Audio Source
• (E) Power Amplifier

Sequence of Blocks in an FM Transmitter:

1. Phase Modulate/Audio Source (D): The first block in the transmitter system would typically be the audio signal (such as music or speech) which is used to modulate the phase of the carrier wave. This signal is often generated from an audio source or phase modulator.
2. Crystal Oscillator (A): A crystal oscillator generates the carrier frequency. The audio signal from (D) modulates this signal, creating the modulated wave that will be amplified.
3. Frequency Multiplier (C): The frequency multiplier increases the frequency of the modulated signal, usually to the appropriate frequency range for FM transmission.
4. Power Amplifier (E): The power amplifier boosts the signal to a level strong enough for transmission over long distances.
5. Antenna (B): Finally, the modulated and amplified signal is transmitted via the antenna.

Correct Sequence:

• (D) -> (A) -> (C) -> (E) -> (B)

Final Answer:

The most appropriate answer is:

Option (4)

This sequence represents the correct order of blocks in an FM transmitter from start to finish.

Q.134

Let's analyze the question step by step to arrange the controllers in increasing order of system complexity.

Controllers Given:

• (A) Proportional Controller
• (B) Proportional plus Derivative Controller
• (C) Proportional plus Integral plus Derivative Controller
• (D) Proportional plus Integral Controller

Understanding the Complexity of Each Controller:

1. Proportional Controller (A): This controller has the least complexity as it only adjusts the output proportionally based on the error signal. It does not involve any integral or derivative action, making it the simplest.
2. Proportional plus Integral Controller (D): This controller adds an integral action to the proportional control. The integral action increases the complexity by eliminating steady-state error, but it is still simpler compared to controllers with derivative action.
3. Proportional plus Derivative Controller (B): This controller includes a derivative action in addition to proportional control. The derivative action introduces more complexity because it anticipates future errors, providing a faster response, but is still simpler than a combined proportional, integral, and derivative controller.
4. Proportional plus Integral plus Derivative Controller (C): This is the most complex controller. It combines proportional, integral, and derivative actions. This controller offers the most advanced control capabilities, with the highest complexity as it uses all three actions.

Arrangement in Increasing Order of Complexity:

• (A) Proportional Controller (simplest)
• (D) Proportional plus Integral Controller
• (B) Proportional plus Derivative Controller
• (C) Proportional plus Integral plus Derivative Controller (most complex)

Final Answer:

The correct order of complexity is:

• (A), (D), (B), (C)

So, the most appropriate answer is:

Option (2): (A), (D), (B), (C)

Q.135

Key Elements in the Circuit:

• Operational Amplifier (Op-Amp): We can see a basic configuration of an op-amp.
• Switch (S1): It allows switching between two ranges of output amplitudes: 0-0.1V and 0-1V.
• Resistors (R1, R2, R3): These are the resistors that determine the gain of the op-amp, which affects the output voltage.

Concept:

The output voltage \( V_o \) of the operational amplifier depends on the resistor values, and the behavior of the circuit will change based on how the switch (S1) is configured.

Relationship between the resistors and gain:

1. Voltage Gain \( A_v \) of an op-amp is given by the formula:

   \( A_v = -\frac{R_3}{R_2} \)

   where \( R_3 \) is the feedback resistor, and \( R_2 \) is the resistor in the input path.
2. Range 1 (0 to 0.1 V output): For this range, the op-amp’s gain needs to be small. Therefore, \( R_3 \) (the feedback resistor) should be small relative to \( R_2 \), making the gain small enough to produce a 0-0.1V output range.
3. Range 2 (0 to 1 V output): For this range, the op-amp’s gain needs to be larger. This means that \( R_3 \) should be significantly larger than \( R_2 \), producing a gain high enough to reach the 0-1V output range.

Steps to solve:

1. For Range 1 (0-0.1 V): We need to minimize the gain, so:
   • \( R_3 \) should be small.
   • \( R_2 \) should be large to ensure that the voltage gain stays low.
2. For Range 2 (0-1 V): We need to maximize the gain, so:
   • \( R_3 \) should be large.
   • \( R_2 \) should be small to allow for a higher gain.

Thus, the order of the resistor values should be:

• \( R_3 \) (largest)
• \( R_2 \) (intermediate)
• \( R_1 \) (smallest)

Final Answer:

The correct arrangement of the resistor values \( R_1 \), \( R_2 \), and \( R_3 \) in increasing order is:

• (C), (A), (B)

So, the most appropriate answer is Option (3): (C), (A), (B).

Q.136

Answer: (2)

Both (A) and (R) are correct but (R) is not the correct explanation of (A).

Explanation

Assertion (A):

A tunnel diode consists of a simple p–n junction made of a degenerate semiconductor. The I–V characteristics consist of three regions and show a negative differential resistance region in part of the forward characteristic.
Correct.
Tunnel diodes are heavily doped p–n junctions (degenerately doped) that exhibit tunneling, resulting in a negative resistance region in their I–V curve.

Reason (R):

In tunnel diode the p-side is highly doped and the n-side is highly doped and also used as detector.
Correct (mostly).
Both sides are indeed heavily doped (degenerate doping). Tunnel diodes are also used as high-speed switches or microwave detectors.

However…

Why (R) is NOT the correct explanation of (A):

• Assertion (A) talks about negative resistance and I–V characteristics due to quantum tunneling.
• Reason (R) only states that both sides are highly doped and mentions its use as a detector, which does not explain the negative resistance behavior.

Thus, even though both statements are correct, (R) does not explain (A).

Correct option: (2)

Q.137

Answer: (1)

Both (A) and (R) are correct and (R) is the correct explanation of (A).

Explanation

• Assertion (A):
  “Dual-slope A/D converter is the most preferred A/D conversion approach in digital multimeters.”
  This is correct. Dual-slope ADCs are widely used in digital multimeters due to their stability and noise immunity.
• Reason (R):
  “Dual-slope A/D converter provides high accuracy in A/D conversion, while at the same time suppressing the noise effect on the input signal.”
  This is also correct. Dual-slope ADCs integrate the input over a fixed time, which averages out noise, especially line-frequency noise (50/60 Hz), leading to high accuracy.

Since the reason directly explains why dual-slope ADCs are preferred in multimeters, (R) is the correct explanation of (A).

Correct option: (1)

Q.138

Let's solve it step by step.

Assertion (A):

“For 8086 microprocessor, the CS:IP loaded in the beginning with the required address from which the execution is to be started.”

Correct

In the 8086 microprocessor, at reset:

• CS = F000H
• IP = FFF0H

Together they form the physical address FFFF0H, the starting point of execution.
Also, whenever execution needs to start at a particular address, CS:IP is loaded with that address.

Reason (R):

“The microprocessor does not perform the next fetch operation till at least one byte of the instruction queue is emptied.”

Correct

8086 uses a 6-byte prefetch queue:

• The Bus Interface Unit (BIU) fetches instruction bytes.
• The Execution Unit (EU) executes instructions.
• BIU fetches only when there is space in the queue (i.e., at least one byte emptied).

So the statement about queue behavior is correct.

But is R the correct explanation of A?

No.
Reason (R) describes the prefetch queue mechanism, which has nothing to do with loading CS:IP at the beginning of execution.

Final Answer → (2)

Both (A) and (R) are correct, but (R) is not the correct explanation of (A).

If you want, I can also explain how the 8086 instruction queue works!

Q.139

Answer: (3) A is correct but R is not correct

Explanation:

• Assertion (A): “Synchronous machine is used as a motor and a generator also.”
  True — A synchronous machine can indeed operate as both a motor and a generator.


• Reason (R): “Synchronous machine can operate at constant speeds and variable frequencies under steady state.”
  Incorrect — A synchronous machine runs at a constant speed only when supplied with a constant frequency.
  Its speed is directly tied to supply frequency by:

  N_s = (120f) / P

  So it cannot operate at variable frequencies while keeping speed constant.

Thus, A is correct, but R is not correct → Option (3).

Q.140

Correct Answer: (2)

Q.141

Correct Answer: (2)

Q.142

Limited-Source Diffusion (Instantaneous Source Diffusion)

This is a standard limited-source diffusion problem.

Solution

For a thin deposited dopant layer with fixed total dose \(Q_T\) (atoms/cm²), and diffusivity \(D\), after diffusion time \(t\), the dopant concentration profile is:

\[ C(x,t) = \frac{Q_T}{\sqrt{\pi D t}} \exp\left( -\frac{x^2}{4Dt} \right) \]

The surface concentration is obtained by evaluating at \(x = 0\):

\[ C_S = C(0,t) \]

\[ C_S = \frac{Q_T}{\sqrt{\pi D t}} \exp(0) \]

\[ C_S = \frac{Q_T}{\sqrt{\pi D t}} \]

Correct Answer: (3)

\[ C_S = \frac{Q_T}{\sqrt{\pi D t}} \]

If you want, I can provide the full derivation from Fick’s second law.

Q.143

Sheet Resistance Concept Explanation

This is a concept question about the definition of sheet resistance \(R_s\) for a diffused semiconductor layer.

Given

A diffused layer with:

• Junction depth: \(x_j\)
• Carrier mobility: \(\mu\)
• Impurity (dopant) concentration: \(C(x)\)
• Charge magnitude: \(q\)

Recall

Resistivity of a semiconductor:

\[ \rho(x) = \frac{1}{q \mu C(x)} \]

Sheet resistance is resistivity integrated over depth:

\[ R_s = \int_0^{x_j} \rho(x) \, dx = \int_0^{x_j} \frac{1}{q \mu C(x)} \, dx \]

Therefore

\[ \boxed{ R_s = \int_0^{x_j} \frac{1}{q \mu C(x)} \, dx } \]

Correct Answer: (3)

\[ R_s = \frac{1}{q \mu} \int_0^{x_j} \frac{1}{C(x)} \, dx \]

Let me know if you'd like this styled differently or embedded into a full webpage!

Q.144

Option 1

Q.145

Option 3

Q.146

This is a standard vector identity:

\( \nabla \times (\nabla \times \mathbf{A}) = \nabla(\nabla \cdot \mathbf{A}) - \nabla^2 \mathbf{A} \)

This is known as the curl of the curl identity.

Comparison with options:

1. \( \nabla \cdot \mathbf{A} - \nabla^2 \mathbf{A} \)
   Incorrect (first term is divergence, not gradient)
2. \( \nabla \cdot (\nabla \times \mathbf{A}) - \nabla^2 \mathbf{A} \)
   Incorrect (divergence of a curl is always zero)
3. \( \frac{1}{\mu_0} \nabla \times \nabla \times \mathbf{A} \)
   Incorrect (just scaled, not the identity)
4. \( \nabla(\nabla \cdot \mathbf{A}) - \nabla^2 \mathbf{A} \)
   Correct

Final Answer: (4)

Q.147

For a small loop antenna, the standard approximate radiation-resistance formula is:

\( R_r \approx 31200 \left( \frac{A}{\lambda^2} \right)^2 \text{ ohms} \)

(for a single-turn loop; this is the commonly used practical constant for small loops.)

Given:

• Square loop with side
  \( l = \frac{\lambda}{10} \)
• Area
  \( A = l^2 = \left( \frac{\lambda}{10} \right)^2 = \frac{\lambda^2}{100} \)

Substitute into the formula:

\( \frac{A}{\lambda^2} = \frac{1}{100} \)

\( R_r = 31200 \left( \frac{1}{100} \right)^2 = 31200 \times \frac{1}{10000} = 3.12\, \Omega \)

Correct answer: (2) 3.12 ohms

Q.148

The given expression is:

\[ P_r = P_t \frac{A_{et} \cdot A_{er}}{r^2 \lambda^2} \]

Analysis

This expression relates:

• \(P_t\): transmitted power
• \(P_r\): received power
• \(A_{et}\): effective aperture of transmitting antenna
• \(A_{er}\): effective aperture of receiving antenna
• \(r\): distance
• \(\lambda\): wavelength

This is the Friis Transmission Formula in terms of effective antenna apertures.

The classic Friis formula is:

\[ P_r = P_t G_t G_r \left( \frac{\lambda}{4\pi r} \right)^2 \]

Using:

\[ G = \frac{4\pi A_e}{\lambda^2} \]

you get exactly the form in the question:

\[ P_r = P_t \frac{A_{et}A_{er}}{r^2\lambda^2} \]

Correct Answer: (3) Friis transmission formula

Q.149

Solution:

Given the electric field components:

\( E_x = 1.5 \sin(\omega t - \beta z)\ \text{V/m} \)
\( E_y = 3 \sin(\omega t - \beta z + 75^\circ)\ \text{V/m} \)

Step 1: RMS Values

\( E_{x,\text{rms}} = \frac{1.5}{\sqrt{2}} = 1.06\ \text{V/m} \)
\( E_{y,\text{rms}} = \frac{3}{\sqrt{2}} = 2.12\ \text{V/m} \)

Total: \( E_{\text{rms}}^2 = (1.06)^2 + (2.12)^2 = 5.61 \)

Step 2: Power Density

Intrinsic impedance of air: \( \eta_0 = 377\ \Omega \)

Average power per unit area:
\[ S_{\text{avg}} = \frac{E_{\text{rms}}^2}{\eta_0} = \frac{5.61}{377} \approx 0.0149\ \text{W/m}^2 = 15\ \text{mW/m}^2 \]

Final Answer: Option B (15 mW/m²)

Q.150

The propagation constant for a uniform plane wave is given by which expression?

1. \(\sqrt{\frac{R + j\omega L}{G + j\omega C}}\)

2. \(\sqrt{(R + j\omega L)(G + j\omega C)}\)

3. \(\sqrt{\frac{j\omega \mu}{\sigma + j\omega \varepsilon}}\)

4. \(\sqrt{\frac{\eta_2 - \eta_1}{\eta_2 + \eta_1}}\)

Correct Answer: Option (2)

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