UGC NET Electronic Science June 2025 Question Paper with Answer Key & Detailed Solutions

  

 

• UGC NET Electronic Science June 2025 Question Paper with Answer Key and Detailed Solutions

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Explanations

1. For forming a p-type semiconductor, the dopant must be a trivalent impurity (three valence electrons) so that it creates acceptor levels and holes become the majority carriers. Among the given elements, boron (B) is a group-III element (trivalent). Arsenic (As) and phosphorus (P) are group-V (pentavalent) donors that produce n-type material, and germanium (Ge) is a group-IV element usually used as the semiconductor, not as an acceptor dopant. Hence, doping an intrinsic semiconductor with B produces a p-type semiconductor.

2. The ohmic resistance of a JFET at zero gate bias is given by the standard relation:

R_DS(on) = V_P / I_DSS

because in the ohmic (linear) region with V_GS = 0, the drain current is controlled by the pinch-off voltage and the saturation current.

Given:
V_P = 4 V,
I_DSS = 10 mA = 10 × 10^-3 A

Substituting:

R_DS(on) = 4 / (10 × 10^-3) = 4 / 0.01 = 400 Ω

Thus, the correct ohmic resistance is 400 Ω.

3. The Zener diode has breakdown voltage V_Z = 10 V and is in series with a resistor R = 820 Ω. The input supply varies from 20 V to 40 V. Maximum Zener current occurs at maximum input voltage when no load current is taken (worst case for Zener).

I_Z,max = (V_in,max − V_Z) / R

= (40 − 10) / 820 = 30 / 820 A

= 0.0366 A = 36.6 mA

Therefore, the maximum current through the Zener diode is 36.6 mA.

4. For a silicon diode, the saturation current approximately doubles for every 10°C rise in temperature. The temperature increases from 25°C to 95°C.

ΔT = 95 − 25 = 70°C

Number of 10°C steps:

70 / 10 = 7

So, the multiplication factor is:

2⁷ = 128

Initial saturation current is I_S1 = 5 nA. Thus,

I_S2 = I_S1 × 128 = 5 × 128 = 640 nA

Hence, the saturation current at 95°C is 640 nA.

5. In λ-based layout design rules for VLSI, the commonly adopted minimum width and spacing. Correct answer is 4*lambda

6. In standard CMOS inverter consisting of a PMOS at the top with its source connected to V_DD and an NMOS transistor at the bottom with its source connected to ground, their gates are tied together to form the input V_in, and their drains are tied together to form the output V_out. Under steady-state condition (PMOS ON, NMOS OFF), V_out ≈ V_DD. Under complementary condition (PMOS OFF, NMOS ON), V_out ≈ 0. Thus, the correct CMOS inverter schematic is identified accordingly.

7. A graph of C_j versus V shows a straight line when the junction doping profile is linearly graded. For a linearly graded junction, the depletion width varies with voltage such that the capacitance–voltage relationship becomes linear when plotted as 1/C_j³ vs V. Shallow or abrupt profiles do not produce linearity, and a quadratic grading produces curvature, not a straight line.

8. The thermodynamic concentration relation follows Arrhenius law, where concentration decreases exponentially with activation energy. The correct physical expression is:

N_v = A · exp(−E_a / kT)

The negative sign in the exponent is essential because higher activation energy reduces equilibrium dopant concentration. Any option with a positive exponent or reciprocal A is physically incorrect.

9. The number of octaves between two frequencies is obtained using logarithmic relations:

log₁₀2 = 0.301

Octaves = log₂(f₂/f₁) = log₁₀(f₂/f₁) / log₁₀2

= log₁₀(f₂/f₁) / 0.301

10. A two-port network is symmetric if its input and output characteristics remain identical when ports are interchanged. In Z-parameters, this requires:

Z₁₁ = Z₂₂

Reciprocity requires:

Z₁₂ = Z₂₁

Thus, a symmetric network satisfies both conditions.

11. Maximum power transfer occurs when the load impedance equals the complex conjugate of the internal impedance. If the network has impedance:

Z = R + jX

Then the load must be:

Z_L = R − jX

This cancels the reactive term and ensures maximum power transfer.

12. In this circuit, the state variables are capacitor voltage v_c and inductor current i_L.

At node A, KCL gives:

i = i_c + i_L

= C (dv_c/dt) + i_L

Thus,

dv_c/dt = (1/C)(i − i_L)

For the inductor-resistor branch, KVL gives:

v_c = L (di_L/dt) + R i_L

So,

di_L/dt = (1/L)v_c − (R/L)i_L

This yields the state-space representation.

13

Phase-Locked Loop (PLL) Locking Condition

In a PLL, the divided VCO output must match the input reference frequency for the PLL to remain in the locked state. The block diagram shows a "÷4 Counter", meaning the VCO output is divided by 4 before being fed back to the phase-frequency detector.

Therefore, the locking condition is f_in = f_out / 4
With the given input reference frequency f_in = 40 MHz,
The locked VCO output frequency must be four times this value:
f_out = 4 × 40 MHz = 160 MHz

14

Op-Amp & MOSFET Circuit Analysis

The non-inverting input of the ideal op-amp is fixed at 2 V, so the op-amp forces the inverting input (node connected to the 4 kΩ resistor and MOSFET gate circuit) to also be at exactly 2 V. The current through the 4 kΩ resistor is determined by the voltage difference between 3 V and the forced 2 V at the inverting input.

Thus, the drain current is:
I_D = (3 - 2) / 4 kΩ = 1/4 mA = 0.25 mA

This same current must flow through the 1 kΩ resistor connected to V_o because the MOSFET is in saturation and the loop forces the same drain current.
Therefore: V_o = I_D × 1 kΩ
V_o = 0.25 mA × 1000 = 0.25 V

15

Closed-Loop Gain of Non-Inverting Amplifier

The circuit is a non-inverting amplifier with feedback resistor R_f = 20 kΩ and grounding resistor R_g = 10 kΩ.

The feedback factor is β = R_g / (R_g + R_f) = 10 / 30 = 1/3
The open-loop gain is limited to A = 15 V/V.
The closed-loop gain A_CL with finite open-loop gain is:
A_CL = A / (1 + Aβ)

Substituting values:
A_CL = 15 / (1 + 15 × 1/3) = 15 / (1 + 5) = 15 / 6 = 2.5 V/V

Thus the closed-loop gain of the circuit is 2.5 V/V.

16

Op-Amp Bandwidth and Dominant Pole

An open-loop gain of 100 dB corresponds to a linear gain of A₀ = 10^100/20 = 10⁵. For a single-pole op-amp, the unity-gain bandwidth (UGB) equals the gain-bandwidth product.

f_UGB = A₀ × f_p (where f_p is the dominant-pole bandwidth).
Given f_UGB = 1 GHz, the open-loop bandwidth is:
f_p = f_UGB / A₀ = 10⁹ / 10⁵ = 10⁴ Hz = 10 kHz

17

Demultiplexer Tree Implementation

To implement a 1-to-256 demultiplexer using 1-to-4 demultiplexers, we cascade stages in a 4-ary tree. Each 1-to-4 demux gives 4 outputs.

We need 4ⁿ = 256
Writing 256 as a power of 4: 256 = 2⁸ = 4⁴
So we need 4 stages.
Number of 1-to-4 demux ICs: 1 + 4 + 4² + 4³ = 1 + 4 + 16 + 64 = 85
Hence, 85 such demultiplexers are required.

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18

Transmission-Gate Logic (XOR Function)

The circuit is a transmission-gate implementation of a logic function. The control signals are B and B.

When B = 0, upper switch connects input A to output: Y = A.
When B = 1, lower switch connects A to output: Y = A.
Combining these: Y = BA + BA, which is exactly the XOR function Y = A ⊕ B.

19

Multiplexer Feedback Circuit

The circuit is a 2-to-1 multiplexer whose one data input is the external signal A and the other data input is the output Y fed back. The select line is "Sel".

When "Sel" = 1, MUX selects A: Y = A.
When "Sel" = 0, MUX selects the feedback input: Y = Y_prev.

Sequential Circuits & Multiplexers

so Y keeps its previous value (Y_new = Y_old). This "load when Sel = 1, hold when Sel = 0" behavior is exactly that of a level-sensitive latch, not a simple combinational gate or an edge-triggered flip-flop.

20: In the given circuit, the D input of the first flip-flop is formed by XOR-ing its own output Q with logic '1'. For a D flip-flop, Q_next = D on each active clock edge; when D = Q ⊕ 1 = Q', the flip-flop toggles its state on every clock edge, so the output frequency is half the clock frequency.

With a 10 kHz clock, the first flip-flop thus produces a 5 kHz square wave at its Q output. The second flip-flop, clocked by the same 10 kHz and driven appropriately, does not further change this basic divide-by-2 action at the observed output node, so the waveform at Q has frequency 5 kHz.

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Microprocessor Architecture

21: The 8051 is an 8-bit microcontroller, meaning it processes 8-bit data and has 8-bit wide ALU and data paths. Architecturally, it uses separate program and data memory spaces (program memory addressed via PSEN, data memory via read/write strobes), which is the defining feature of a Harvard architecture. It is neither 16-bit nor 32-bit, and it does not follow the single shared-memory Von-Neumann model. Therefore the correct description is "8-bit Harvard architecture".

22: TYPE 4 interrupt in 8085 is the restart interrupt RST 4. RST 4 is triggered by the overflow flag (V flag). Therefore, TYPE 4 corresponds to the overflow interrupt.

23: The Intel 8086 microprocessor is fabricated using HMOS technology. Its transistor count is approximately 29,000 transistors. The other options represent counts of much newer or older processors, not 8086.

24: Instruction AAA (ASCII Adjust after Addition) is specifically used after adding two unpacked BCD/ASCII-coded decimal digits in register AL. It examines the lower nibble of AL and the auxiliary carry flag; if the result is not a valid BCD digit (0-9), it adds 6 to AL and adjusts AH accordingly. Thus, AAA is meant to adjust the ASCII/BCD content of AL after an ADD instruction, which corresponds exactly to "Adjust ASCII after addition."

Vector Calculus & EM Fields

25: The vector is:

A̅ = 3y²z² â_x + 4x³z² â_y + 3z²y² â_z

Divergence is: ∇ · A̅ = ∂Ax/∂x + ∂Ay/∂y + ∂Az/∂z

Compute each term: ∂/∂x(3y²z²) = 0 (no x in expression) ∂/∂y(4x³z²) = 0 (no y in expression) ∂/∂z(3z²y²) = 6zy²

∇ · A̅ = 6zy²

26: Electric flux density D is defined as: D = εE. D has units of coulombs per square meter. Therefore the correct is C/m².

27: Velocity of a uniform plane wave in free space is:

v = 1 / √(μ₀ε₀) This is the speed of light in vacuum (≈ 3 × 10⁸ m/s).

28: The characteristic impedance of free space is:

η₀ = √(μ₀/ε₀) ≈ 377 Ω

Angle Modulation

29: The angle-modulated signal is:

x_c(t) = 10 cos [ (10⁸ π)t + 5 sin (2π (10³)t) ]

The phase deviation term is 5 sin (·).

Therefore |φ(t)|_max = 5 rad
Frequency deviation for PM is
Δf = (1 / 2π) * (d/dt) [5sin(2π × 10³ t)]
= (1 / 2π) × (5)(2π × 10³)
= 5 × 10³ = 5 kHz
Hence, option 1 is correct.

30. AM transmission efficiency η is defined as
η = (power in sidebands / total transmitted power) × 100
Sideband power = P_s
Total transmitted power = P_t
Thus, η = (P_s / P_t) × 100
Matches option 1.

31. A spectrum analyzer displays signal strength vs frequency. It does not show time-domain waveforms. Therefore, it is purely a frequency-domain instrument. Hence, option 2 is correct.

32. A step-index fiber has a uniform core refractive index n₁. The cladding has a slightly lower index n₂ < n₁. The refractive index changes abruptly (step) at the core-cladding boundary. This matches option 1 exactly.

33. di/dt rating tells how fast current may increase when the SCR turns on. If the current rises too fast, localized hot spots damage the device. Therefore, the rating specifies the maximum safe rate of rise of anode current. Matches option 1.

34. A Switched-Mode Power Supply (SMPS) operates by converting the input AC or DC to high-frequency pulses using fast electronic switching. Because the transformer and filter components work at much higher frequencies than in linear supplies, their size and weight are greatly reduced. SMPS also regulates output voltage using pulse-width control, making it far less sensitive to input voltage changes compared to linear regulators. Hence, the main advantage is high efficiency, compact size, low weight, and better immunity to input variations.

35. A power MOSFET's switching behavior is governed by how quickly charge can be added or removed from its gate. The MOSFET has intrinsic capacitances such as C_gs, C_gd and C_ds. During switching, these capacitances must be charged or discharged, and the speed with which this happens depends heavily on the impedance of the gate-drive circuit. A high gate-drive impedance slows the process, causing slower turn-on and turn-off times. Therefore, the internal capacitances and gate-drive impedance dominate the switching characteristics.

36. In BJTs, as temperature increases, the base-emitter voltage V_BE decreases, causing collector current to rise. This makes BJTs prone to thermal runaway because higher temperature increases current, which further increases heating. This behavior corresponds to a negative temperature coefficient. MOSFETs, however, exhibit a positive temperature coefficient, meaning their channel resistance increases with temperature. As a result, their current tends to self-limit, improving thermal stability and making current sharing easier in parallel operation.

37. The Wien's bridge is specifically designed for measuring unknown frequencies. Its balance condition depends on a ratio of resistors and capacitors that is satisfied only at a particular frequency. When the bridge balances, the unknown frequency can be computed accurately from the component values. Other bridges in the options are used for inductance or capacitance measurement, not frequency determination, making Wien's Bridge the correct choice.

38. A strain gauge works on the principle that the electrical resistance of a conductor changes when it is stretched or compressed. When mechanical strain is applied, the gauge lengthens or shortens, causing a proportional change in resistance. This change is then measured using bridge circuits to determine the magnitude of strain. Because its primary sensing mechanism is resistance variation, a strain gauge is classified as a resistive transducer.

39. the fastest rise time that an oscilloscope can reproduce is related to its bandwidth by the standard approximation:
t_r = 0.35 / Bandwidth
for a bandwidth of 10 MHz:
t_r = 0.35 / (10 × 10⁶)
= 35 × 10^-9 s = 35 ns
So, the minimum (fastest) rise time of a sine wave that can be accurately reproduced is 35 ns.

40. A 4 ½ digit voltmeter has a maximum count of 19999 (first "half" digit can be 0 or 1, remaining four digits 0000-9999). The smallest change it can resolve is therefore roughly:
Resolution ≈ 1 / 20000 ≈ 0.00005
which is conventionally taken as 0.0001 of full-scale value. Among the given options, this corresponds to 0.0001, so the correct choice is option 3.

41. Multijunction solar cells are arranged from highest bandgap (top) to lowest bandgap (bottom).
Typical bandgaps:
• GaInP (≈ 1.85 eV) → top
• AlGaAs (≈ 1.7 eV)
• GaInAs (≈ 1.4 eV)
• Ge (≈ 0.67 eV) → bottom
So, ordered sequence (top → bottom): "GaInP", "AlGaAs", "GaInAs", "Ge". This matches C, B, D, A.

42. Correct MOS fabrication sequence is:
A. Wafer formation
B. Oxidation - grow SiO₂
C. Photolithography - patterning
D. Gate + source/drain formation - implantation/diffusion
E. Metallization - metal contacts
Thus, the correct order is A, C, B, D, E.

43. In terms of decreasing noise margin (highest → lowest), the common ordering of logic families is: CMOS > NMOS > TTL > ECL. CMOS has the largest noise margins because its logic levels are close to the supply rails. NMOS has lower margins than CMOS but still better than TTL. TTL has moderate noise margin, while ECL, using very small voltage swings around a negative supply, has the smallest margin in absolute volts. Writing this order with the given labels:
C. CMOS (highest)
B. NMOS
D. TTL
A. ECL (lowest)
So, the required decreasing noise-margin sequence is C, B, D, A, which corresponds to option 3.

44. First we must identify the network structure, so we choose a normal tree for the network (A). Next, we select state variables: capacitor voltages or charges on tree branches and inductor currents or fluxes on co-tree chords (B). Then we write all independent KVL, KCL and element voltage-current relations (VCR) to form the complete set of equations (C). From this large equation set we eliminate all non-state variables (node voltages, other currents etc.) to reduce it to an equation only in state variables and inputs (E). Finally, we rearrange this reduced vector-matrix differential equation into standard state-variable form x' = Ax + Bu, y = Cx + Du (D). Hence, the correct logical sequence is A, B, C, E, D.

45. Conduction angle is the portion of the signal cycle during which the active device conducts. In Class D (E) switching amplifiers, the device conducts in very narrow pulses (effective smallest conduction angle). Class C (B) conducts for less than 180°. Class B (A) conducts for exactly 180°. Class AB (C) conducts for slightly more than 180° but less than 360°. Class A (D) conducts for the full 360° of the cycle.
Thus, in order of increasing conduction angle, we have: Class D (E) → Class C (B) → Class B (A) → Class AB (C) → Class A (D), i.e., E, B, A, C, D.

46. Power efficiency increases as we move from Class A towards switching classes. Class A (A) has the lowest efficiency (theoretically up to 25-50% depending on load and configuration).

Class AB (B) improves efficiency compared to A (typically ~50-60%). Class B (C) has still higher efficiency (theoretical maximum 78.5%). Class C (D) is more efficient than B (can exceed 80-85% in RF applications). Class D (E) switching amplifiers can achieve the highest efficiencies (often >90%). So, in increasing order of power efficiency, we get A → B → C → D → E.

47. A PAL (A) is a specific simple programmable logic with fixed OR array and programmable AND array; it is one of the most basic PLDs. SPLD (B) is a generic term for simple PLDs (including PAL/PLA/GAL), representing a slightly broader but still simple category. CPLD (C) consists of several SPLD-like blocks interconnected on a chip, so its internal architecture is more complex and supports larger designs. FPGA (D) is the most complex, containing an array of configurable logic blocks, rich routing resources and advanced features. Thus, in order of increasing architectural complexity, the sequence is PAL → SPLD → CPLD → FPGA, i.e. A, B, C, D.

48. In the 8086 flag register, the relevant flag bit positions (from LSB upwards) are: CY (carry) at bit 0; Z (zero) at bit 6; T (trap) at bit 8; D (direction) at bit 10; and O (overflow) at bit 11. Arranging these flags in ascending order of their bit positions: CY (A, bit 0) → Z (D, bit 6) → T (B, bit 8) → D (C, bit 10) → O (E, bit 11). This corresponds to the sequence A, D, B, C, E.

49. For the 8086 microprocessor in 40-pin DIP form, the relevant pin numbers are: NMI (A) at pin 17, INTR (B) at pin 18, LOCK (C) at pin 29, RD (D) at pin 32 and MN/MX (E) at pin 33. Arranging these in ascending order of pin number gives 17 → 18 → 29 → 32 → 33, i.e. NMI (A), INTR (B), LOCK (C), RD (D), MN/MX (E). Hence the correct ascending order is A, B, C, D, E, which corresponds to option 3.

50. We arrange electromagnetic waves from longest wavelength to shortest.
Wavelength order (long → short):
B. Radio waves - longest wavelength
A. Microwaves - shorter than radio waves
E. Infrared - next shorter
C. Visible light - even shorter
D. Ultraviolet - shortest among the given
Thus the required sequence (long → short) is B, A, E, C, D.

51. For M-ary PSK, spectral efficiency (bits/s/Hz) is
η = (log₂ M) / 2
when we take total RF bandwidth B_rf = 2R_s. Thus for M = 2, 4, 8, 16, 32, we get η = 0.5, 1.0, 1.5, 2.0, 2.5 respectively. The question labels these efficiencies as A = 0.5, B = 1.0, C = 1.5, D = 2.0, E = 2.5. Therefore, in the same order of M (2, 4, 8, 16, 32), the efficiencies map as A, B, C, D, E, which matches option 2.

52. Indirect generation of wideband FM first produces narrowband FM, then increases deviation using multipliers.
Steps:
A. Baseband signal → message input
B. Integrator → converts to phase modulation input
C. Narrowband FM/NBFM modulator → produces small-deviation FM
D. Frequency multiplier → increases frequency deviation and shifts carrier
Thus the correct sequence for indirect wideband FM generation is: A, B, C, D.

53. In a standard negative-feedback control system, we first have the setpoint C, which is the desired value. This is compared with the feedback signal in the error detector A to generate the error. The controller E then processes this error and produces a control signal that drives the control actuator D. The actuator excites the plant, whose output is B. So, the correct functional order is: Setpoint → Error detector → Controller → Control Actuator → Plant output, i.e. C, A, E, D, B.

54. For a basic ammeter with meter current I_m = 1 mA, meter resistance R_m and shunt R_sh, the total range current is
I = I_m (1 + R_m / R_sh)

Compute R_m / R_sh for each:
D. R_m = 80 Ω, R_sh = 1.63 Ω
⇒ R_m / R_sh ≈ 49.1 ⇒ I_D ≈ 50 mA
A. R_m = 10 Ω, R_sh = 0.17 Ω
⇒ R_m / R_sh ≈ 58.8 ⇒ I_A ≈ 60 mA
C. R_m = 30 Ω, R_sh = 0.38 Ω
⇒ R_m / R_sh ≈ 78.9 ⇒ I_C ≈ 80 mA
E. R_m = 100 Ω, R_sh = 1.01 Ω
⇒ R_m / R_sh = 99.0 ⇒ I_E ≈ 100 mA
B. R_m = 60 Ω, R_sh = 0.06 Ω
⇒ R_m / R_sh ≈ 1000 ⇒ I_B ≈ 1 A

Thus, ascending order of current ranges (smallest to largest) is
D (≈ 50 mA) < A (≈ 60 mA) < C (≈ 80 mA) < E (≈ 100 mA) < B (≈ 1 A),
i.e. D, A, C, E, B.
Since none of the listed options matches this exact sequence, the answer is NONE, with correct order D, A, C, E, B.

55. The Hall-effect coefficient magnitude |K_H| is inversely proportional to the carrier concentration. Materials with lower free-carrier density exhibit higher |K_H|. Among the given: Te (D) and As (A) are semiconductors with relatively low carrier concentration; Si (C) is also a semiconductor but with higher carrier density than Te and As; Fe (B) is a metal with very high carrier density and hence very small Hall coefficient.
Therefore, in descending order of Hall coefficient (maximum → minimum): Te → As → Si → Fe, i.e. D, A, C, B.

56. A. "Degenerative semiconductors are lightly doped" – incorrect; degenerately doped semiconductors are heavily doped, so Fermi level moves inside a band.
B. "The mobility of GaAs is higher than silicon" – correct; electron mobility in GaAs (≈ 8500 cm²/V·s) is much higher than that in Si (≈ 1350 cm²/V·s).
C. "LEDs are made up of direct band semiconductor" – correct; efficient radiative recombination (light emission) needs a direct band gap material such as GaAs, GaP, GaAsP, etc.
D. "In a diode, the width of depletion region increases with the increase in doping of p and n regions" – incorrect; depletion width W is inversely proportional to √N; higher doping makes the depletion layer narrower.

Thus, only B and C are correct, so option 2 is the right choice.

57. N-channel FET uses electrons as majority carriers, while P-channel FET uses holes. Since electron mobility is higher than hole mobility, N-channel devices have larger carrier mobility (A true) and therefore can achieve larger transconductance for the same geometry and bias (D true). Also, since electrons are carriers in an N-channel FET, statement B is true. The relative noise level (C) is not inherently higher for N-channel; that statement is not generally valid, so C is false.
Hence, A, B and D only are correct.

58. In Bode-plot based stability analysis, a stable and well-damped system requires positive gain margin and positive phase margin (A true). These margins directly indicate how far the system is from the instability boundaries; hence stability depends on gain and phase margins (D true). Saying they must be negative (B) or that stability is independent of them (C) is wrong.
Therefore, A and D only are correct.

59. In a full-wave bridge rectifier, both positive and negative half-cycles are rectified, so the output pulsates at twice the line frequency; hence the output waveform frequency is 2 × input frequency (A true). In a half-wave rectifier, only

one half of each cycle is used; the pulsation frequency therefore remains the same as the input frequency (D true). Statements B and C contradict these facts, and the average (dc) level of a half-wave rectifier is only half that of a full-wave rectifier for the same peak voltage, so E is false. Thus, A and D only are correct.

60. A 2-to-1 multiplexer is a universal building block; by appropriately connecting its data inputs and select lines (and by cascading several 2 : 1 MUXes), any Boolean function can be implemented (A true). The function F = A · B + C can be implemented using three 2-input NAND gates: one NAND for A, B, one NAND to invert C, and a third NAND to combine the two, giving F = AB + C (B true). SRAM is volatile and loses data when power is off (so C false). ROM is non-volatile (D false). DRAM is slower than SRAM (E false). Therefore only A and B are correct.

61. A. (Correct): 8259 is indeed a Programmable Interrupt Controller used with 8086/8088 systems. B. (Incorrect): Hardware interrupts are asynchronous, not synchronous, because they occur independent of CPU clock timing. C. (Correct): 8086 has 20 address lines (A0-A19) and can address 1 MB of memory. D. (Incorrect): The signals RQ/GT₀ and RQ/GT₁ are used in maximum mode, not minimum mode. E. (Correct): 8087 is the floating-point coprocessor for 8086/8088. Thus, the correct statements are A, C, E, matching option 3.

62. For the n-type GaAs Gunn diode, the given parameters are:
Drift velocity: V_d = 10⁷ cm/s
Doping concentration: n = 2 × 10¹⁴ cm^-3
Electric field: E = 3200 V/cm

Step 1: Compute Current Density J
J = n q V_d
J = (2 × 10¹⁴)(1.6 × 10^-19)(10⁷)
J = 320 A/cm²
Thus, option A (320 A/cm²) is correct.

Step 2: Compute Electron Mobility μ
μ = V_d / E
μ = 10⁷ / 3200
μ = 3125 cm²/V·s
Among the given choices, the closest value is: Option B: 3100 cm²/V·s. Options D (1450) and E (1500) are far from the computed mobility.

Final Correct Pair
Correct statements are:
A. 320 A/cm²
B. 3100 cm²/V·s
Hence, the correct option is 1: A and B only.

63. Check each statement:
A. (Correct): Duality property of Fourier transform states that g(t) ⇔ G(f) ⇒ G(t) ⇔ g(-f). So statement A is correct.
B. (Incorrect): A mixer is the essential element of a superheterodyne receiver; it performs frequency translation.
C. (Incorrect): Power spectral density (PSD) of a wide-sense stationary (WSS) random process is non-negative, not negative.
D. (Incorrect): FM broadcast band is 88-108 MHz, not GHz.
E. (Correct): AM broadcast band is 0.535-1.605 MHz.
Thus, the correct statements are A and E, matching option 4.

64. For a system to be (asymptotically) stable, a bounded input must produce a bounded output, so statement B is true. In terms of the characteristic equation, all poles must lie in the left half of the s-plane, i.e. all roots must have negative real parts and therefore be in the left half-plane; so D and E are both true and equivalent. A system with roots having positive real parts would be unstable, and an unbounded output for a bounded input contradicts stability, so A and C are false.

65. B is true because Lissajous figures are obtained when a CRO is operated in X-Y mode, with one signal on the X-plates and another on the

Y-plates. D is true since DC coupling passes DC and low-frequency components, so it is essential for low-frequency and low repetition-rate signals; AC coupling would block the DC component. A is false because dual-trace oscilloscopes can generally also be operated in X-Y mode. C about phosphor vs mesh storage CRT life is not generally correct, and E “sampling is done in cathode ray oscilloscopes” is not true for a normal CRO (only for specialized sampling scopes).

66. In a solar cell, the short-circuit current I_SC is approximately directly proportional to illumination (light intensity), so when illumination increases, I_SC increases almost linearly—thus B is true. The open-circuit voltage V_OC varies logarithmically, not linearly, with illumination, so A is false. Statement C contradicts B by saying I_SC is fairly constant, so it is false. D is false because single-crystal silicon solar cells generally have higher efficiency than polycrystalline ones.

67. In optical photoresists, exposure to light changes their solubility in the developer, so A is true. For negative photoresist, light exposure causes cross-linking/polymerization, making the exposed regions less soluble in the developer – C is true. For positive photoresist, exposure breaks bonds and makes the exposed regions more soluble – D is true. Statement B (“solubility does not change”) is opposite to the basic working principle and is false.

68. To find Thevenin's resistance R_th seen at a pair of terminals, all independent sources are turned off:
• An independent current source is replaced by an open circuit → statement C true.
• An independent voltage source is replaced by a short circuit → statement D true.
We do not leave sources “as it is” (E false), and the alternatives “voltage sources open” (A) or “current sources short” (B) are incorrect.

69. For small-signal amplifier applications, a MOSFET must be biased in its saturation (active) region, where drain current is relatively independent of drain-source voltage and depends mainly on gate-source voltage, giving a linear transconductance; so A is true, while B is false (linear/triode region is used when we want it to behave like a resistor). For BJTs used as amplifiers, they are biased in the active region, not saturation (saturation is for switching), so D is true and C is false. Also, MOSFET used as a resistor is biased in linear region, not saturation, so E is false.
Thus, only A and D are correct.

70. A flip-flop has two stable states and therefore is correctly referred to as a bistable multivibrator, so A is true. For n Boolean variables, the total number of possible logic functions is 2²ⁿ, not 2ⁿ, so B is false. Dynamic hazards (multiple unwanted transitions before settling) indeed may occur in asynchronous sequential circuits, since there is no global clock to mask glitches, so C is true. While static hazards can exist in combinational logic even inside synchronous systems, the standard textbook emphasis is that static hazards are associated with asynchronous or unclocked behavior, so statement D as written is taken as false here. HDLs (like Verilog/VHDL) are mainly for digital design entry, not analog (except special AMS extensions), so E is considered false in this exam context.
Hence the correct combination is A and C only.

71. The 8051 is an 8-bit microcontroller, with 8-bit ALU and registers, so A is true. Its PSW (Program Status Word) includes an overflow flag OV, so B is true. The standard 8051 has five interrupt sources (INT0, INT1, Timer0, Timer1, and serial port), making C true. It supports indexed addressing mode via instructions like MOVC A, @A + DPTR and MOVC A, @A + PC, so D is true. The instruction CJNE (Compare and Jump if Not Equal) is a valid 8051 instruction, so E is also true.
Therefore, all A, B, C, D and E are correct, matching option 3.

72. In a general (possibly lossy) transmission line the characteristic impedance is
Z₀ = √((R + jωL) / (G + jωC))
so statement A is correct.
For a lossless line (R = G = 0), the propagation constant becomes

γ = jω√LC,
so the phase constant is
β = ω√LC,
which matches statement B.
The phase velocity is
v_p = ω / β = 1 / √LC
for a lossless line, so E is correct. Statement C has R + jωC and G + jωL interchanged, and D gives a wrong expression for β, so those are false.

73. For a real-valued signal, the Fourier transform has the conjugate-symmetry property, so talking of "conjugate function" as a property of the Fourier transform (A) is accepted as true. Statement B,
P_R = (P_T G_T G_R) / L_p, is the standard Friis transmission equation (received power vs transmitted power, gains, and path loss), so it is true. The increase of power level from 13 W to 36 W is not 8 W (it is 23 W, and in dB not 8 either), so C is false. Autocorrelation of a real energy signal is an even function, not odd, so D is false. Parseval's theorem needs ∫_-∞^∞ |G(f)|² df, not the integral from 0 to ∞ only, so E is false. Hence, only A and B are correct.

74. A thyristor (SCR) structure is a p-n-p-n four-layer device, so A is correct, and this structure naturally has three junctions (J1, J2, J3), making B correct. When the anode is positive w.r.t. cathode with the gate open, the SCR is forward biased but not triggered, so it operates in forward blocking mode, which matches C. When the cathode is positive w.r.t. anode, the device is reverse biased and in reverse blocking mode, as stated in D. Statement E incorrectly associates cathode positive with forward blocking (it is actually reverse blocking), so E is false. Therefore, the correct set is A, B, C and D only.

75. A. Lithium sulphate is a common piezo-electric material — TRUE. Lithium sulphate monohydrate (Li₂SO₄ · H₂O) is indeed a known piezoelectric material, similar to quartz and Rochelle salt. Hence this statement is correct.

B. Hall-effect magnetic-to-electric transducers are very sensitive to temperature variations — TRUE. Hall sensors depend on charge-carrier mobility and concentration, both of which change significantly with temperature. This makes Hall-effect transducers strongly temperature-dependent.

C. LVDT is not sensitive to stray magnetic fields — FALSE. An LVDT works on electromagnetic induction and external magnetic fields can distort the coupling, inducing interference. Therefore, LVDTs require magnetic shielding. Hence this statement is not correct.

D. MEMS technology is used to design sensors at micrometer scale — TRUE. MEMS devices typically range from 1 µm to a few millimeters. Sensors like accelerometers, pressure sensors, and gyros are widely fabricated using MEMS technology.

E. Piezo-electric crystals can be used as inverse transducers — TRUE in actuality, but the statement in the question says “cannot be used”. Piezo materials can act as inverse transducers (actuators). Since the statement claims “cannot”, the statement is FALSE.

Thus, the correct statements are A, B, and D only.

76. To match dimensional structures with their density-of-states (DOS) variation:

• Quantum Dot (0-D): DOS consists of discrete delta-like spikes because electrons are confined in all three dimensions ⇒ matches IV.
• Quantum Wire (1-D): DOS shows a series of sharp peaks corresponding to 1-D sub-bands ⇒ matches III.
• Quantum Well (2-D): DOS consists of step-like increases because each sub-band contributes a constant DOS ⇒ matches II.
• Bulk (3-D): DOS varies as √E, gradually increasing as energy increases ⇒ matches I.

Therefore, the correct matching order is: A-IV, B-III, C-II, D-I.

77. A → III (Graphene → sp² hybridization)
Graphene is a monolayer of carbon atoms arranged in a honeycomb lattice. Each carbon atom forms three σ-bonds using sp² hybrid orbitals, and the remaining p-orbital forms delocalized π-bonds. Its defining structural feature is therefore sp² hybridization.

B → I (Carbon Nanotube → Chirality)
A Carbon Nanotube (CNT) is created by rolling a graphene sheet into a cylinder. The manner in which it is rolled is described by the chiral vector (n, m). Chirality determines key electrical properties — metallic or semiconducting — making it the correct associated property.

C → IV (ZnO → Wide bandgap and high transparency)
Zinc oxide is a II-VI semiconductor with a wide bandgap of about 3.37 eV. This causes ZnO to be highly transparent in the visible region and widely used in transparent electronics and UV photodetectors.

D → II (SiC → High thermal conductivity)
Silicon Carbide exhibits very high thermal conductivity, high breakdown electric field, and robustness at high temperature, making it ideal for power electronics. Hence, II is the best match.

Thus, the correct matching is: A-III, B-I, C-IV, D-II.

78. Identification rules for MOSFET symbols:
Arrow direction:

• Arrow inward → n-channel
• Arrow outward → p-channel

Channel line type:

• Solid line → Depletion mode (channel exists at V_GS = 0)
• Broken/dotted line → Enhancement mode (channel does not exist at V_GS = 0)

Applying these:

• A → I (n-channel depletion MOSFET): Arrow points inward (n-channel) and channel is solid → depletion type.
• B → IV (p-channel enhancement MOSFET): Arrow points outward (p-channel) and channel is dotted → enhancement type.
• C → II (p-channel depletion MOSFET): Arrow outward (p-channel) with a solid channel → depletion type.
• D → III (n-channel enhancement MOSFET): Arrow inward (n-channel) with a dotted channel → enhancement type.

Thus, the correct sequence is: A-I, B-IV, C-II, D-III.

79. A → I (Input Impedance with output short-circuited = h₁₁)
Because h₁₁ = v₁ / i₁ |_v2=0
Output shorted → v₂ = 0

B → II (Reverse Voltage Gain with input open-circuited = h₁₂)
h₁₂ = v₁ / v₂ |_i1=0
Input open → i₁ = 0

C → III (Forward Current Gain with output short-circuited = h₂₁)
h₂₁ = i₂ / i₁ |_v2=0
Output shorted.

D → IV (Output Admittance with input open-circuited = h₂₂)
h₂₂ = i₂ / v₂ |_i1=0
Input open → i₁ = 0.

80. A → II (Superposition → Linearity)
Superposition is valid only for linear systems.

B → III (Routh-Hurwitz → Stability Criterion)
It determines whether all system poles lie in left-half plane.

C → I (Open-Circuit Impedance → Z-parameter)
Z-parameters require open-circuit testing.

D → IV (Short-Circuit Admittance → Y-parameter)
Y-parameters require short-circuit testing.

81. • A → II (Low-Pass Filter → very small gain at high frequencies)
LPF passes low frequencies and attenuates high frequencies.

• B → I (High-Pass Filter → high gain at high frequencies)
HPF blocks low frequencies.

• C → IV (Band-Pass Filter → high gain in a frequency band)
Passes only a selected band.

• D → III (Band-Reject Filter → very small gain in a specific band)
Also called notch filter; attenuates a band and passes others.

82. CMOS logic family has the least static power dissipation because in a complementary structure one transistor of the pair is OFF in steady state, so DC current is almost zero → A-II. ECL logic family has the highest speed of operation since its transistors never saturate and operate in the active region, avoiding storage delay → B-III. TTL logic family uses multi-emitter input transistors in its standard NAND gates, so "multiple emitter transistors are used" is its characteristic → C-IV. Pseudo-NMOS logic family attains very high packing density because only one transistor type (n-channel) is used, allowing dense integration → D-I.

83. Flash ADC is the fastest converter because it uses 2ⁿ-1 parallel comparators and performs conversion in one step, so it corresponds to "fastest ADC" → A-IV. Successive-approximation ADC takes a fixed number of clock steps equal to the resolution bits, giving a predictable, constant conversion time → B-I. Dual-slope ADC integrates the input over a time interval, giving excellent noise rejection and accuracy; therefore it is widely used in precision measuring instruments like digital multimeters → C-III. Sigma-Delta ADCs employ oversampling and a 1-bit quantizer in the modulator loop, so they match "1-bit quantization" → D-II.

84. A generic "Microcontroller" in this context refers to the classic Intel 8051, an 8-bit microcontroller core, so A maps to 8051 → A-IV. The 8086 microprocessor contains a Bus Interface Unit with a 6-byte instruction queue for prefetching and pipelining, so it matches "6-byte Instruction Queue" → B-I. The standard DMA Controller IC used with 808x systems is the 8237, so DMA Controller → 8237 → C-II. The Programmable Interrupt Controller used with 8086 is the 8259, which handles multiple interrupt requests, so D-III.

85. A. Divergence theorem → II
The Divergence theorem (Gauss's Divergence theorem) relates the flux of a vector field through a closed surface to the triple integral of the divergence of that field over the volume it encloses:
&oiint; A · ds = ∫∫∫ (∇ · A) dv
This exactly matches LIST-II option II.

B. Stokes theorem → III
Stokes theorem converts a line integral of a vector field around a closed path into the surface integral of the curl of that field:
∮ F · dl = ∫∫ (∇ × F) · dS
This matches LIST-II option III.

C. Gauss Law → I
Gauss's Law in electromagnetics relates electric flux through a closed surface to the charge enclosed:
Q = ∫∫∫ ρ_v dv
Thus, Gauss Law corresponds to LIST-II option I.

D. Poisson's equation → IV
Poisson's equation connects potential with charge density:
∇²V = -ρ_v / ε
This matches LIST-II option IV.
Hence, correct option is 1.

86. A. (Standing Wave Ratio - SWR) corresponds to expression IV, because
SWR = (1 + |τ|) / (1 - |τ|)
which matches the given formula in List-II (IV).

B. (Reflection Coefficient τ) corresponds to III, since...

τ = (Z_L - Z₀) / (Z_L + Z₀)
matches List-II (III).

C. (Propagation Constant γ) corresponds to I, because
γ = √((R + jωL)(G + jωC))
matches the structure of expression (I).

D. (Characteristic Impedance Z₀) corresponds to II, since
Z₀ = √((R + jωL) / (G + jωC))
matches List-II (II).

Thus, the correct match is A-IV, B-III, C-I, D-II.

87. • A → IV (Sinc Function)
Sinc (λ) is defined as the normalized sinc function:
sinc(λ) = sin(πλ) / (πλ)
This corresponds to List-II option IV.

• B → I (White Noise)
A signal whose power spectral density is independent of frequency is white noise. Hence it matches I.

• C → III (M-ary PAM System)
For an M-ary PAM system:
1 baud = log₂ M bits/sec
This corresponds to III.

• D → II (Huffman Code)
Huffman coding requires knowledge of a probabilistic model of the source to allocate optimal variable-length codewords. Thus, it matches II.

88. For a second-order system:
G(s) = ω_n² / (s² + 2ζω_ns + ω_n²)
The damping ratio ζ determines the step response type.

• A → IV
G(s) = 25 / (s² + 25)
Here:
ω_n = 5
Damping term = 0 ⇒ ζ = 0
This is an undamped system → sustained oscillations. Matches IV.

• B → III
G(s) = 36 / (s² + 70s + 36)
ω_n = 6, 2ζω_n = 70 ⇒ ζ = 5.83 > 1
This is overdamped → slow monotonic rise, no oscillations. Matches III.

• C → I
G(s) = 36 / (s² + 12s + 36)
ω_n = 6, 2ζω_n = 12 ⇒ ζ = 1
This is critically damped → fastest monotonic response without overshoot. Matches I.

• D → II
G(s) = 36 / (s² + 7s + 49)
ω_n = 7, 2ζω_n = 7 ⇒ ζ = 0.5
This is underdamped → oscillatory with decaying amplitude. Matches II.

89. • A → II (δ = 0 → Undamped)
When the damping coefficient δ = 0, the system has no damping and exhibits sustained oscillations. Hence the response is Undamped (II).

• B → I (0 < δ < 1 → Underdamped)
For 0 < δ < 1, the system shows oscillatory behavior with decaying amplitude, which is the definition of an Underdamped response. Matches I.

• C → IV (δ = 1 → Critically Damped)
When δ = 1, the system returns to equilibrium as fast as possible without oscillations, which is the hallmark of a Critically damped response. Matches IV.

• D → III (δ > 1 → Overdamped)
For δ > 1, the system responds slowly without oscillations, which defines an Overdamped system.
Matches III.

90. • A → III (Miner → Spectrum Analyzer)
"Miner" refers to the Miner rule used in fatigue analysis, but in instrumentation context here it corresponds to a Spectrum Analyzer, used for frequency-domain evaluation of cyclic loads or vibration signals.
Matches III.

• B → I (Gating Error → Frequency Measurement)
Gating error arises in frequency counters, where the measurement error depends on the gate time. Thus it matches Frequency measurement (I).

• C → II (QRS Wave → ECG)
The QRS complex is a central component of the Electrocardiogram (ECG), representing ventricular depolarization. Matches II.

• D → IV (C-shaped Bourdon → Pressure Transducer)
A C-shaped Bourdon tube is a widely used pressure-measuring transducer in industrial instrumentation. Matches IV.

91. In constant voltage scaling (CVS) with factor S = 0.7:
Gate delay τ ∝ S (standard CVS table).
Speed ∝ 1/τ ⇒ speed scales as 1/S.
Speed factor = 1/S = 1/0.7 ≈ 1.43.

92. DIBL is a short-channel effect where a higher drain voltage pulls down the source barrier, so the effective threshold voltage decreases as V_DS increases.

93. For CVS:

• V unchanged.
• Channel resistance R ∝ S.
• Current I ∝ 1/R ∝ 1/S.

Power of one device P ≈ VI:
P_scaled / P_orig = 1/S = 1/0.7 ≈ 1.43
So, power dissipation increases by about 1.43 times.

94. For constant field scaling (CFS) with S = 0.7:

• Power P ∝ S².
• Area A = S².

So, power density:
P / A ∝ S² / S² = 1
Power density stays the same as the unscaled device.

95. In CFS:

• V → SV
• W, L, t_ox → S
• C_ox ∝ 1 / t_ox → 1/S

ON current (saturation):
I_DS = (W / L) · C_ox(V_GS - V_T)²
⇒ I_DS ∝ (1) · (1/S) · (S)² = S

So:
I_{ON, scaled} / I_{ON, orig} = S = 0.7
ON current becomes 0.7 times the original.

96. A geostationary satellite orbits at about 35,786 km above Earth's surface. Rounded to the nearest available choice → 35,800 km.

97. Given:
Core refractive index n₁ = 1.45
Cladding refractive index n₂ = 1.40
Numerical aperture formula:
NA = √(n₁² - n₂²)
NA = √(1.45² - 1.40²)
= √(2.1025 - 1.96)
= √0.1425 ≈ 0.3774.

98. The commonly used detectors in optical communication receivers are:
Avalanche Photodiode (APD)
PIN Photodiode
LED and LASER are transmitters, not detectors. Zener diode is irrelevant to optical communication.

99. Formula for minimum reuse distance:
D = √(3K) · R.

100. 4G LTE typically offers:

• Mobile device speed: up to 100 Mbps
• WIFI (LAN) network speed: up to 1 Gbps

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