Rectifiers Summary Rectifiers: Frequency, Regulation & Ripple Factor 1. Output Frequency of Rectifiers Half-Wave Rectifier A half-wave rectifier uses only one half-cycle of the AC input signal. For each input cycle, one output pulse is produced. Output Frequency: f output = f input Example: If input is 50 Hz, output is 50 Hz. Full-Wave Rectifier A full-wave rectifier uses both positive and negative halves of the AC signal. The negative half is inverted, producing two pulses per cycle. Output Frequency: f output = 2 × f input Example: If input is 50 Hz, output is 100 Hz. 2. Voltage Regulation of an Ideal Rectifier Voltage regulation measures the change in output voltage between no-load and full-load conditions. Formula: Regulation = (V no-load − V full-load ) / V full-load × 100% Ideal Rectifier No internal resistance No voltage drop across diodes No power loss Therefore, V no-load = V full-load Regula...

Hamming (7,4) Example – Step by Step Data bits: D = [1,0,1,1] Step 1: Parity-Check Matrix H H = [1 0 1 0 1 0 1 0 1 1 0 0 1 1 0 0 0 1 1 1 1] Parity bits are at positions 1,2,4; data bits at positions 3,5,6,7. Step 2: Extract P from H Using standard form H = [P^T | I], we get: P^T (columns 3,5,6,7) = [1 1 0 1 1 0 1 1 0 1 1 1] Transpose to get P : P = [1 1 0 1 0 1 0 1 1 1 1 1] Step 3: Generator Matrix G = [I | P] G = [1 0 0 0 | 1 1 0 0 1 0 0 | 1 0 1 0 0 1 0 | 0 1 1 0 0 0 1 | 1 1 1] Step 4: Encode Data → Codeword Multiply D × G (mod 2): D = [1 0 1 1] C = D × G = [1 0 1 1 0 1 1] (Codeword = [P1 P2 D1 P3 D2 D3 D4]) Step 5: Transmission with Error Assume bit 6 flips → Received codeword: R = [1 0 1 1 0 0 1] Step 6: Compute Syndrome S = H × R^T s1 = r1⊕r3⊕r5⊕r7 = 1⊕1⊕0⊕1 = 1 s2 = r2⊕r3⊕r6⊕r7 = 0⊕1⊕0⊕1 = 0 s3 = r4⊕r5⊕r6⊕r7 = 1⊕0⊕0⊕1 = 0 S = [s3 s2 s1] = [0 0 1] Binary 001 → Position 6 (the flipped bit) Step 7: Correct Err...

Forward Error Correction (FEC) Data Input (4 Bits) Simulate Channel Noise (Flip a Bit) Flip B1 Flip B2 Flip B3 Flip B4 Flip B5 Flip B6 Flip B7 Reset Channel (Clear Errors) 1. Transmitted Code-Word (4 Data + 3 Parity) 2. Received Noisy Waveform (Channel) 3. Decoded & Corrected Output No errors detected. Simulation Workflow 1. Channel Encoding: The 4 input bits are passed through a Hamming Generator. It creates 3 "Parity" bits by XORing specific data bit combinations. The final packet is 7 bits long. 2. Noisy Channel: You can simulate interference by clicking "Flip Bit." This simulates a case where noise was strong enough to change a voltage from High to Low. 3. Syndrome Decoding: The receiver doesn't just "read" the bits. It re-calculates the parity. If the re-calculated bits don't match, ...

V-BLAST SIC (MIMO) Simulator Signal-to-Noise Ratio (SNR dB) 20 dB Spatial Interference (Channel Cross-Talk) Medium Coupling Stream 1 (Antenna A) 1011 Stream 2 (Antenna B) 0110 MIMO Receiver Processing: Mixed Signal vs. Successive Cancellation Simulation Workflow 1. Spatial Multiplexing: Two independent bitstreams (Blue and Yellow) are transmitted simultaneously on the same frequency using two antennas. 2. Channel Mixing: Due to the nature of MIMO, the receiver's antenna sees a Linear Combination of both streams. This is the messy white wave in the center graph. 3. Successive Interference Cancellation (SIC): The receiver first decodes Stream 1 (treating Stream 2 as noise). Once Stream 1 is known, the receiver subtracts its waveform from the mixture. The remaining signal is now "Clean," allowing Stream 2 to be decoded with zero interfer...

SINR-Based Adaptive Modulation Desired Signal Power (S) High Power Interference Power (I) Low Congestion Calculated SINR 0 dB Active Modulation BPSK Efficiency (bps/Hz) 0 Simulation Workflow 1. Channel Measurement: The receiver estimates the Desired Signal Power (S), the power from interfering towers (I), and the background thermal noise (N). 2. SINR Calculation: The system computes the SINR. Notice that even if the Signal is strong, increasing Interference will force the system to drop from 16-QAM to BPSK to maintain the link. 3. Feedback (CQI): In a real system, the receiver sends a Channel Quality Indicator (CQI) back to the transmitter, which then updates the modulation order for the next set of "Yellow Sticks" (Symbol Durations). Mathematical Framework The SINR (Signal to Interference plus Noise Ratio) is defined as: SINR linear = S / (...

Adaptive LMS Threshold Decoder Channel Drift (Fading Offset) +30V LMS Learning Rate (μ) Fast Adaptation Adaptation Mode LMS Adaptive Threshold Fixed Threshold (0V) Estimated Offset (Adaptive) 0.00V Decoded Stream (RX) How it works: Decision-Directed LMS The receiver uses a feedback loop to track the signal offset without any "pilot" tones. This is known as Blind Adaptive Estimation . 1. Error Detection: After making a decision on a bit (1 or 0), the receiver calculates the error e[n] between the actual sampled voltage and the expected ideal level (Target). 2. The Update Rule: The threshold is updated for the next bit using the Least Mean Square (LMS) update formula: Threshold[n+1] = Threshold[n] + μ · Error[n] Move the "Channel Drift" slider. In Fixed Mode , errors occur immediately. In Adaptive Mode , yo...

JK Flip-Flop Simulator Hold (0,0) Reset (0,1) Set (1,0) Toggle (1,1) Manual Clock Pulse Auto Clock: OFF ⏱ Speed: Q=0 | J=0 K=0 📘 Logic Explanation Select J/K inputs and press clock to trigger the flip-flop. 📜 Steps Log Simulation ready...

Interactive Eye Diagram & Noise Margin Filter Roll-off (α) α = 0.4 Noise Level Bitstream (TX) Stage 1: Components (Click Legend to Hide/Show) Stage 2: Composite Signal Stage 3: The Eye (Annotated Analysis) Simulation Workflow 1. Pulse Mapping: Each bit a[k] is mapped to a pulse shape p(t) . We use the Raised Cosine filter, which is the standard for bandwidth-limited communication. Clicking the legend above removes a specific bit's contribution to show how it affects the neighbors. 2. Linear Superposition: The total signal x(t) is the sum of all individual pulses shifted by the symbol period T . This "Combined Waveform" shows how pulses "bleed" into each other, cre...