Q.  The relation between the input current (I) and the output voltage (V) of a circuit is governed by the equation: 𝐶𝑑𝑉 𝑑𝑡 =𝐼(𝑡)−𝑚(𝑡). The circuit is excited by I(t) = q(t), where q is a real valued constant. V at 𝑡=0− is V0. Which of the following is an equivalent representation of the above case? Solution The relationship between input current I(t) and output voltage V(t) is governed by the equation: C dV/dt = I(t) − m(t) The circuit is excited by an impulse current: I(t) = qδ(t) Given: V(0 − ) = V 0 Step 1: Substitute the input current Since I(t) = qδ(t), substitute it into the circuit equation: C dV/dt = qδ(t) − m(t) Step 2: Integrate across the impulse ...

  Q. Consider a discrete memoryless source with an alphabet of four source symbols. The signal s(t) has four levels (-1, 0, +1, +2) and generates 10 4 symbols per second. Find the equivalent Nyquist bandwidth. (A) 10 kHz (B) 64 kHz (C) 5 kHz (D) 20 kHz  Given Number of signal levels: M = 4 Symbol rate: R s = 10 4 symbols/s Signal levels: -1, 0, +1, +2 Calculate Nyquist bandwidth For ideal Nyquist signaling, the minimum bandwidth can be expressed in terms of the symbol rate: B = R s / 2 B = 10,000 / 2 = 5,000 Hz Correct answer Option (C) — 5 kHz Using the symbol-rate definition of Nyquist bandwidth, B = R s /2 gives 5 kHz. Don't confuse symbol rate with ...

ADC Conversion Time Comparison: Flash, SAR, Ramp & Dual-Slope ADC ADC Conversion Time: Flash, Digital Ramp, SAR and Dual-Slope ADC Analog-to-digital converters (ADCs) convert continuous analog signals into digital values. Different ADC architectures require different amounts of time to complete this conversion. This guide explains the working principles, conversion-time formulas, and differences between Flash, Digital Ramp, Successive Approximation, and Dual-Slope ADCs. Table of Contents Flash ADC conversion time Digital Ramp ADC conversion time Successive Approximation ADC conversion time Dual-Slope ADC conversion time ADC conv...

CMOS logic gates are digital electronic circuits built using Complementary Metal-Oxide-Semiconductor (CMOS) technology. They use two types of MOSFET transistors, NMOS and PMOS, to perform Boolean logic operations such as NOT, NAND and NOR. CMOS technology is widely used in modern digital integrated circuits because it offers low static power consumption, high input impedance and good noise immunity. 1. How CMOS Logic Gates Work CMOS Logic Gates: Block Diagram CMOS logic gates use complementary PMOS and NMOS transistors to implement digital logic functions. CMOS logic gate block diagram Input A, B, ... CMOS Network PMOS pull-up NMOS pull-down Output Y Examples: NOT, NAND, NOR CMOS circuits use complementary NMOS and PMOS transistors to control the output voltage. In a typical CMOS logic gate, the PMOS network provides a path from the ou...

  Q. Consider the Friis’ transmission equation 𝑃𝑅=(𝑃𝑇𝐺𝑇𝐺𝑅𝜆2) (4𝜋𝐷)2 ⁄ , where P𝑅 and 𝑃𝑇 are the received and the transmitted powers, respectively. G𝑇 and 𝐺𝑅 are the gain of transmitting and receiving antennas, respectively, 𝐷 is the distance between the transmitting and receiving antennas, and 𝜆 is the wavelength in free space. Given: 𝐺𝑇=𝐺𝑅=1.0,𝜆=0.30 m and PT = +10 dBm. Choose the distance (D), in km, from the following options at which the received power, PR = −90 dBm? Solution Given, P T ​ = + 10 dBm P R = − 90   dBm P R ​ = − 90 dBm G T = G R = 1 G T ​ = G R ​ = 1 (linear gain) λ = 0.30   m λ = 0.30 m P R ​ (in dBm) − P T ​   (in dBm):  Power difference in dB dB = 10^(dB/10) (in ratio) Pr = Pt.Gt.Gr.λ^2 / (4.π.D)^2 Or, Pr/Pt = Gt.Gr.λ^2 / (4.π.D)^2 Or, 10^(-90-10)/10 = Gt.Gr.λ^2 / (4.π.D)^2 Or, 10^-10 = 1.1.(0.3)^2 / (4.π.D)^2 Or, D = 15/2π Answer: Option B