Forward Error Correction (FEC)
Simulation Workflow
1. Channel Encoding: The 4 input bits are passed through a Hamming Generator. It creates 3 "Parity" bits by XORing specific data bit combinations. The final packet is 7 bits long.
2. Noisy Channel: You can simulate interference by clicking "Flip Bit." This simulates a case where noise was strong enough to change a voltage from High to Low.
3. Syndrome Decoding: The receiver doesn't just "read" the bits. It re-calculates the parity. If the re-calculated bits don't match, it generates a Syndrome. This syndrome acts like a map that points directly to the bit that failed.
4. Automatic Correction: Once the failed bit is identified, the receiver flips it back (0 to 1 or 1 to 0). You will see the corrected bit highlighted in Green.
Mathematical Framework
Hamming (7,4) uses three parity equations (modulo-2 addition):
P2 = D1 ⊕ D3 ⊕ D4
P3 = D2 ⊕ D3 ⊕ D4
At the receiver, we check the "Syndrome" bits (S1, S2, S3). If the binary value of the syndrome (S3 S2 S1) is non-zero, it tells us the exact position of the error. For example, if bit 3 flips, the receiver calculates a syndrome that mathematically points to position 3.