Q. Select the correct statement(s) regarding CMOS implementation of NOT gates.
(A) Noise Margin High (๐๐H) is always equal to the Noise Margin Low (๐๐H), irrespective of the sizing of transistors.
(B) Dynamic power consumption during switching is zero.
(C) For a logical high input under steady state, the nMOSFET is in the linear regime of operation.
(D) Mobility of electrons never influences the switching speed of the NOT gate.
Answer: Option C
Solution
Option A : NMH and NML are generally not equal because electron mobility is about 2–3 times hole mobility.
Designers often make pMOS wider (roughly 2–3×) to equalize them.Option B: Whenever the output changes, the load capacitor charges/discharges.
Therefore dynamic power is non-zero during switching.
Therefore dynamic power is non-zero during switching.
Option C: (Correct) Hence the nMOS is indeed in the linear (triode) region at steady state.
Option D: Higher electron mobility ⇒ higher current ⇒ faster discharge ⇒ lower delay.
Electron mobility directly affects switching speed.
Electron mobility directly affects switching speed.