Delta Modulation & Demodulation Technique
Another name for delta modulation is a 1-bit quantizer. As a result, compared to PCM or DPCM, less bandwidth is needed here.
We know that bandwidth (BW),
BW = nfs/2 .........(1)
Where n = number of bits per sample
fs = Frequency of Sampling
To avoid the cause of under-sampling, fs cannot be decreased in the above equation 1 to decrease bandwidth (BW). To retrieve the intended signal at the receiver side, we must keep our sample frequency at least two times the frequency of the message signal.
Alternatively, fs > 2fm
In this case, fm stands for message signal frequency, which is often the highest frequency available in message transmission.
However, in delta modulation, the bandwidth will be reduced to the smallest amount feasible by picking the lowest possible value of n, i.e. 1 bit/sample.
Assume that Rb = nfs is the data rate.
As a result, Rb = fs (if n=1 bit/sample)
So, in the delta modulation scheme, we can say,
Bit rate = Pulse rate = Sampling rate
Because we're only allocating 1 bit/sample, the number of levels is L = 2^(1) = 2. In general, the highest level is represented by '+∆', while the lowest level is represented by '-∆'. From the quantizer value we decide whether the sampling bit is '1' or '0'.
In delta modulation, we actually accomplish the following:
We compare the current sample value to the prior sample value in this modulation. When the difference (also known as "error") value exceeds the threshold value, the value is detected as "1." In the same way, if it goes below the threshold value, it will be '0'.
Diagram:
Fig: Delta Modulation
Here, the input of the quantizer,
e(nTs) = m(nTs) – m^(nTs)
Where, m(nTs) = current sample
m^(nTs) = previous sample
The difference between the current sample value and the previous sample value (or, e(nTs)) is the quantizer's input. The modulated signal is represented as bit '1' if the difference value is greater than the threshold value (say, 0 Volt); otherwise, it is represented as bit '0'.
With the use of diagrams, we'll now discuss delta modulation (DM) and demodulation at the receiver side.
Delta Demodulation
Assume there are two levels (due to the one-bit quantizer) or that the quantizer step value is '+∆' and '–∆' on the negative side. '+∆' indicates a higher level, whereas '-∆' indicates a lower level.
Take a look at the quantizer diagram below. If the difference (or error value) between the current sample value and the prior sample value exceeds the threshold value, the sample will be converted to bit '1' (For your convenience, let's say, the threshold is 0 Volt). If the above-mentioned difference value is between 0 and + ∆ Volt, we convert it to bit '1'. Similarly, we translate to bit '0' for values between 0 and - ∆ Volt.
Diagram of DM Quantizer:
DM Encoder:
DM Decoder at receiver side:
In decoding process, at t=0,
sample value = 0
At, t = Ts, sample value = 0+∆ =
+∆
t = 2Ts, sample value = +∆ +∆ = +2∆
t = 3Ts, sample value = +2∆ +∆ = +3∆
t = 4Ts, sample value = +3∆ -∆ = +2∆
t = 5Ts, sample value = +2∆ -∆ = +∆
Whenever the signal reaches the receiver it was 0, at t=0 & t< Ts; At t=Ts, we receive +∆. Now, the summation of the present sample value and previous sample value (which is '0' at the start) equals 0 +∆= +∆; At t=2Ts, the sum of the current sample value and previous sample value = +∆ +∆ = +2∆ and so on (as shown in the above chart).
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